2024 100114

B.Tech 1st Semester Examination, 2024

Time 03 Hours
Full Marks 70
Instructions:
  • The marks are indicated in the right-hand margin.
  • There are NINE questions in this paper.
  • Attempt FIVE questions in all.
  • Question No. 1 is compulsory.

Q.1 Choose the correct answer from the following (Any seven questions only):

Q1.1

Which of these is used for amplification?

a)

BJT in cutoff

b)

BJT in saturation

c)

BJT in active mode

d)

BJT in reverse active mode

Q1.2

Which terminal in JFET controls the current?

a)

Gate

b)

Source

c)

Drain

d)

Substrate

Q1.3

BJT used as a switch operates in:

a)

Active region

b)

Reverse active

c)

Cutoff and Saturation

d)

Linear region

Q1.4

What is the built-in potential typically across a silicon p-n junction?

a)

0.3 V

b)

0.7 V

c)

1.1 V

d)

2.0 V

Q1.5

What is the peak inverse voltage for a center-tap full-wave rectifier?

a)

VmV_m

b)

Vm/2V_m/2

c)

2Vm2V_m

d)

2Vm\sqrt{2}V_m

Q1.6

Zener diode is mostly used in:

a)

Amplification

b)

Rectification

c)

Voltage regulation

d)

Oscillation

Q1.7

In MOSFET, the gate terminal is:

a)

Conductive

b)

Directly connected to the source

c)

Insulated from the channel

d)

Connected to the drain

Q1.8

The voltage gain of a voltage follower (buffer amplifier) is:

a)

Zero

b)

Infinity

c)

Unity

d)

Negative

Q1.9

In 2's complement method, what is the 2's complement of binary number 0101?

a)

1011

b)

1101

c)

1111

d)

1010

Q1.10

Which of the following is a universal gate?

a)

AND

b)

OR

c)

NAND

d)

NOT

Q.2 Solve both questions :

Q2.1

Explain the construction and working of an Enhancement Type MOSFET and draw its characteristics.

Q2.2

Define operating point. Explain the concept of load line analysis with suitable diagrams.

Q.3 Solve both questions :

Q3.1

With a neat diagram, explain the working of a Zener diode as a voltage regulator and draw its V-I characteristics.

Q3.2

Describe the three configurations of BJT (CE, CB, CC) and their applications.

Q.4 Solve both questions :

Q4.1

Derive the Shockley equation for JFET and explain the parameters involved.

Q4.2

Explain the difference between intrinsic and extrinsic semiconductors with suitable energy band diagrams.

Q.5 Solve both questions :

Q5.1

Discuss the role of filter circuits in rectifier applications. Explain the capacitor filter with waveforms.

Q5.2

Determine the value of the current through the diode circuit given below. Assume $ V_\gamma = 0.7 \, V $.

Question Diagram

Q.6 Solve both questions :

Q6.1

Convert $(0.513)_{10}$ to octal.

Q6.2

Explain how an Op-Amp integrator works and derive the output expression.

Q.7 Solve both questions :

Q7.1

Discuss the mechanism of breakdown in a diode. Differentiate between Zener and Avalanche breakdown.

Q7.2

Find the output of the Op-amp. Assume Op-amp is ideal.

Question Diagram

Q.8 Solve both questions :

Q8.1

Explain the working of a Half Wave Rectifier and derive the expressions for average and RMS values of output voltage.

Q8.2

Implement an XOR gate using NAND gates.

Q.9 Write short notes on any two of the following:

Q9.1
a)

Virtual ground in Op-Amp circuits.

b)

Describe the concept of thermal runaway in BJT.

c)

VI characteristics of LED

d)

Half- Adder


2024 V4 100114

B.Tech 1st Semester Examination, 2024

Time 03 Hours
Full Marks 70
Instructions:
  • The marks are indicated in the right-hand margin.
  • There are NINE questions in this paper.
  • Attempt FIVE questions in all.
  • Question No. 1 is compulsory.

Q.1 Choose the correct answer from the following (Any seven questions only):

Q1.1

Which of these is used for amplification?

a)

BJT in cutoff

b)

BJT in saturation

c)

BJT in active mode

d)

BJT in reverse active mode

Q1.2

Which terminal in JFET controls the current?

a)

Gate

b)

Source

c)

Drain

d)

Substrate

Q1.3

BJT used as a switch operates in:

a)

Active region

b)

Reverse active

c)

Cutoff and Saturation

d)

Linear region

Q1.4

What is the built-in potential typically across a silicon p-n junction?

a)

0.3 V

b)

0.7 V

c)

1.1 V

d)

2.0 V

Q1.5

What is the peak inverse voltage for a center-tap full-wave rectifier?

a)

VmV_m

b)

Vm/2V_m/2

c)

2Vm2V_m

d)

2Vm\sqrt{2}V_m

Q1.6

Zener diode is mostly used in:

a)

Amplification

b)

Rectification

c)

Voltage regulation

d)

Oscillation

Q1.7

In MOSFET, the gate terminal is:

a)

Conductive

b)

Directly connected to the source

c)

Insulated from the channel

d)

Connected to the drain

Q1.8

The voltage gain of a voltage follower (buffer amplifier) is:

a)

Zero

b)

Infinity

c)

Unity

d)

Negative

Q1.9

In 2's complement method, what is the 2's complement of binary number 0101?

a)

1011

b)

1101

c)

1111

d)

1010

Q1.10

Which of the following is a universal gate?

a)

AND

b)

OR

c)

NAND

d)

NOT

Q.2 Solve both questions :

Q2.1

Explain the construction and working of an Enhancement Type MOSFET and draw its characteristics.

Q2.2

Define operating point. Explain the concept of load line analysis with suitable diagrams.

Q.3 Solve both questions :

Q3.1

With a neat diagram, explain the working of a Zener diode as a voltage regulator and draw its V-I characteristics.

Q3.2

Describe the three configurations of BJT (CE, CB, CC) and their applications.

Q.4 Solve both questions :

Q4.1

Derive the Shockley equation for JFET and explain the parameters involved.

Q4.2

Explain the difference between intrinsic and extrinsic semiconductors with suitable energy band diagrams.

Q.5 Solve both questions :

Q5.1

Discuss the role of filter circuits in rectifier applications. Explain the capacitor filter with waveforms.

Q5.2

Determine the value of the current through the diode circuit given below. Assume $ V_\gamma = 0.7 \, V $.

Question Diagram

Q.6 Solve both questions :

Q6.1

Convert $(0.513)_{10}$ to octal.

Q6.2

Explain how an Op-Amp integrator works and derive the output expression.

Q.7 Solve both questions :

Q7.1

Discuss the mechanism of breakdown in a diode. Differentiate between Zener and Avalanche breakdown.

Q7.2

Find the output of the Op-amp. Assume Op-amp is ideal.

Question Diagram

Q.8 Solve both questions :

Q8.1

Explain the working of a Half Wave Rectifier and derive the expressions for average and RMS values of output voltage.

Q8.2

Implement an XOR gate using NAND gates.

Q.9 Write short notes on any two of the following:


2021 100303

B.Tech 3rd Semester Exam., 2021 (New Course)

Time 03 Hours
Full Marks 70
Instructions:
  • The marks are indicated in the right-hand margin.
  • There are NINE questions in this paper.
  • Attempt FIVE questions in all.
  • Question No. 1 is compulsory.

Q.1 Answer the following questions (any seven) :

Q1.1

Derive the relation between $ \beta $ and $ \alpha $ of a transistor. What is reverse leakage current in CE configuration?

Q1.2

What is modulation index in AM?

Q1.3

What is the concept of frequency reuse in cellular network?

Q1.4

What is the use of offset null input in the operational amplifier? How are they used?

Q1.5

Why is negative feedback desired in amplifier application?

Q1.6

Emitter bias or self-bias is more stable than fixed bias. Justify.

Q1.7

Explain how the process of avalanche breakdown occurs in a P-N junction diode. How is it different from Zener breakdown?

Q1.8

Justify that $ \overline{m}_j = M_j $ where $ m_j $ and $ M_j $ are th minterm (product term) and maxterm (sum term) respectively.

Q1.9

Mention the disadvantages of Wien bridge oscillator.

Q1.10

Mention the applications of one-shot multivibrator.

Q.2 Solve both questions :

Q2.1

Draw the waveform of output voltage $ V_0 $ if input is square wave and explain the operation of circuit given below.

Question Diagram
Q2.2

Calculate the $ I_{RMS} $, $ I_{DC} $, ripple factor, rectification efficiency and PIV of rectifier circuit given below.

Question Diagram

Q.3 Solve both questions :

Q3.1

For the network of figure given below, determine the following parameters using the approximate equivalent model: Voltage gain $ A_v $, Current gain $ A_i $, Input impedance $ Z_i' $ and $ Z_i $.

Question Diagram
Q3.2

Draw the circuit diagram of voltage-series feedback amplifier and derive the expression of closed-loop voltage gain.

Q.4 Solve both questions :

Q4.1

Explain the operation performed by circuit given below and derive the expression of output voltage $ V_0 $.

Question Diagram
Q4.2

Op-amp can be used to subtract the DC voltages (subtraction operation). Draw the circuit and explain the operation of subtractor using op-amp in non-inverting mode.

Q.5 Solve both questions :

Q5.1

Draw and explain the GSM signalling protocol architecture.

Q5.2

What is the need of modulation? Draw the wave shape of modulating signal, carrier signal and modulated wave in amplitude modulation.

Q.6 Solve both questions :

Q6.1

Draw the functional block diagram and explain the operation of monostable multi-vibrator using IC 555 timer.

Q6.2

Draw the basic circuit of an R-C phase-shift oscillator and explain its operation. If $ R_1 = R_2 = R_3 = 400 \text{ k}\Omega $ and $ C_1 = C_2 = C_3 = 50 \text{ pF} $, determine the frequency of oscillation in phase-shift oscillator.

Q.7 Solve both questions :

Q7.1

Implement the function $ F(A,B,C) = \Sigma(1,3,4,6,7) $ using $ 8 \times 1 $ MUX. Use A, B and C as selection line in which C is LSB and A is MSB.

Q7.2

Design 3-bit binary incrementer/decrementer circuit with the help of gates. When inputs are 000 and control pin is low, output should be 111. When inputs are 111 and control pin is high, output should be 000. For other combinations of inputs, when control pin is high, output should be incremented by one and when control pin is low, output should be decremented by one.

Q.8 Solve both questions :

Q8.1

Design a combinational circuit to check that two numbers $ A = (A_3A_2A_1A_0) $ and $ B = (B_3B_2B_1B_0) $ are equal with the help of gates. Output should be indicated by X. Output line X should be high if $ A = B $.

Q8.2

Design $ 8 \times 3 $ priority encoder with the help of basic gates.

Q.9 Solve both questions :

Q9.1

Compare the function and architecture of microprocessor and microcontroller.

Q9.2

Draw the input-output and transfer characteristics of CE amplifier.


2021 V4 100303

B.Tech 3rd Semester Exam., 2021 (New Course)

Time 03 Hours
Full Marks 70
Instructions:
  • The marks are indicated in the right-hand margin.
  • There are NINE questions in this paper.
  • Attempt FIVE questions in all.
  • Question No. 1 is compulsory.

Q.1 Answer the following questions (any seven) :

Q1.1

Derive the relation between $ \beta $ and $ \alpha $ of a transistor. What is reverse leakage current in CE configuration?

Q1.2

What is modulation index in AM?

Q1.3

What is the concept of frequency reuse in cellular network?

Q1.4

What is the use of offset null input in the operational amplifier? How are they used?

Q1.5

Why is negative feedback desired in amplifier application?

Q1.6

Emitter bias or self-bias is more stable than fixed bias. Justify.

Q1.7

Explain how the process of avalanche breakdown occurs in a P-N junction diode. How is it different from Zener breakdown?

Q1.8

Justify that $ \overline{m}_j = M_j $ where $ m_j $ and $ M_j $ are th minterm (product term) and maxterm (sum term) respectively.

Q1.9

Mention the disadvantages of Wien bridge oscillator.

Q1.10

Mention the applications of one-shot multivibrator.

Q.2 Solve both questions :

Q2.1

Draw the waveform of output voltage $ V_0 $ if input is square wave and explain the operation of circuit given below.

Question Diagram
Q2.2

Calculate the $ I_{RMS} $, $ I_{DC} $, ripple factor, rectification efficiency and PIV of rectifier circuit given below.

Question Diagram

Q.3 Solve both questions :

Q3.1

For the network of figure given below, determine the following parameters using the approximate equivalent model: Voltage gain $ A_v $, Current gain $ A_i $, Input impedance $ Z_i' $ and $ Z_i $.

Question Diagram
Q3.2

Draw the circuit diagram of voltage-series feedback amplifier and derive the expression of closed-loop voltage gain.

Q.4 Solve both questions :

Q4.1

Explain the operation performed by circuit given below and derive the expression of output voltage $ V_0 $.

Question Diagram
Q4.2

Op-amp can be used to subtract the DC voltages (subtraction operation). Draw the circuit and explain the operation of subtractor using op-amp in non-inverting mode.

Q.5 Solve both questions :

Q5.1

Draw and explain the GSM signalling protocol architecture.

Q5.2

What is the need of modulation? Draw the wave shape of modulating signal, carrier signal and modulated wave in amplitude modulation.

Q.6 Solve both questions :

Q6.1

Draw the functional block diagram and explain the operation of monostable multi-vibrator using IC 555 timer.

Q6.2

Draw the basic circuit of an R-C phase-shift oscillator and explain its operation. If $ R_1 = R_2 = R_3 = 400 \text{ k}\Omega $ and $ C_1 = C_2 = C_3 = 50 \text{ pF} $, determine the frequency of oscillation in phase-shift oscillator.

Q.7 Solve both questions :

Q7.1

Implement the function $ F(A,B,C) = \Sigma(1,3,4,6,7) $ using $ 8 \times 1 $ MUX. Use A, B and C as selection line in which C is LSB and A is MSB.

Q7.2

Design 3-bit binary incrementer/decrementer circuit with the help of gates. When inputs are 000 and control pin is low, output should be 111. When inputs are 111 and control pin is high, output should be 000. For other combinations of inputs, when control pin is high, output should be incremented by one and when control pin is low, output should be decremented by one.

Q.8 Solve both questions :

Q8.1

Design a combinational circuit to check that two numbers $ A = (A_3A_2A_1A_0) $ and $ B = (B_3B_2B_1B_0) $ are equal with the help of gates. Output should be indicated by X. Output line X should be high if $ A = B $.

Q8.2

Design $ 8 \times 3 $ priority encoder with the help of basic gates.

Q.9 Solve both questions :

Q9.1

Compare the function and architecture of microprocessor and microcontroller.

Q9.2

Draw the input-output and transfer characteristics of CE amplifier.


2020 100303

B.Tech 3rd Semester Exam., 2020

Time 3 hours
Full Marks 70
Instructions:
  • The marks are indicated in the right-hand margin.
  • There are NINE questions in this paper.
  • Attempt FIVE questions in all.
  • Question No. 1 is compulsory.

Q.1 Answer the following questions (any seven):

Q1.1

Why is negative feedback desired in amplifier application?

Q1.2

Draw the voltage transfer curve of op-amp.

Q1.3

State the Barkhausen's criteria for electronic system to oscillate with feedback.

Q1.4

How is amplifier different from the oscillator?

Q1.5

Why is the reception in the case of amplitude modulation usually noisy?

Q1.6

What is cell splitting and how does it increase the capacity of cellular network?

Q1.7

Justify that BJT is current controlled while FET is voltage-controlled device.

Q1.8

Name the breakdown mechanism in the lightly doped P-N junction diode under reverse biased condition.

Q1.9

Why is Gray code also called as reflected code? Convert $(396)_{10}$ to Gray code.

Q1.10

For the logical circuit shown in the figure, derive the simplified Boolean expression for output Y.

Question Diagram

Q.2 Solve both questions:

Q2.1

Draw the waveform of output $V_{0}$ and explain the operation of circuit with AC source $V_i$, Resistor R, Parallel diode clippers with bias voltages $V_{R1}$ and $V_{R2}$.

Question Diagram
Q2.2

In the given circuit, calculate the load current $I_{L}$ and Zener diode current $I_{Z}$ with 20V source, 1k$\Omega$ resistor, 5V Zener diode, 1.2k$\Omega$ Load $R_L$.

Question Diagram

Q.3 Solve both questions:

Q3.1

Calculate the maximum DC voltage and DC current available from a half-wave rectifier. What is the PIV of the diode used in the rectifier?

Question Diagram
Q3.2

Calculate the value of $R_{1}$ in the biasing circuit, so that the Q-point is fixed at $I_{C}=8~mA$ and $V_{CE}=3~V$ with $-V_{CC} = -9V$, 250$\Omega$ collector resistor, 500$\Omega$ emitter resistor, $\beta=80$.

Question Diagram

Q.4 Solve both questions:

Q4.1

Minimize the given Boolean function F using K map in SOP and implement using NAND gate: $F(A,B,C,D)=AB\overline{C}D+\overline{A}BCD+\overline{A}\overline{B}\overline{C} $ + $ \overline{A}\overline{B}\overline{D}+A\overline{C}+A\overline{B}C+\overline{B}C$

Q4.2

The circuit given is the basic application of op-amp to perform the addition operation. Explain the operation of circuit and derive the expression of output voltage.

Question Diagram

Q.5 Solve both questions:

Q5.1

Design the voltage follower using op-amp and explain the operation.

Q5.2

Draw the circuit diagram of voltage-shunt feedback amplifier and derive the expression of closed-loop voltage gain.

Q.6 Solve both questions:

Q6.1

Draw the block diagram of cellular network and briefly explain its operation.

Q6.2

Draw the functional block diagram of AM transmitter and receiver.

Q.7 Solve both questions:

Q7.1

Design Schmitt trigger using IC 555 timer and explain its operation with the help of functional diagram.

Q7.2

If $R_{1}=R_{2}=R_{3}=450~k\Omega$ and $C_{1}=C_{2}=C_{3}=60pF$, determine the frequency of oscillation in phase-shift oscillator. Draw the basic circuit of an R-C phase-shift oscillator and explain its operation.

Q.8 Solve both questions:

Q8.1

A new clocked X-Y flip-flop is defined with inputs X and Y in addition to the clock input. The flip-flop functions are as follows:
If XY=00 the flip-flop changes state with each clock pulse.
If XY=01 the flip-flop state Q becomes 1 with the next clock pulse.
If XY=10, the flip-flop state Q becomes 0 with the next clock pulse.
If XY=11, no change of state occurs with the clock pulse.
Write the truth table and excitation table of X-Y flip-flop. Implement the X-Y flip-flop using a J-K flip-flop.

Q8.2

What is the race around condition in J-K flip-flop? What are the methods to resolve the race around condition in J-K flip-flop? Explain each method with the help of example.

Q.9 Solve both questions:

Q9.1

What are the problems with normal encoder? How can these problems be solved by the priority decoder? Design 2 to 4 lines priority encoder.

Q9.2

Draw the block diagram of micro-controller and briefly explain each block.


2020 V2 100303

B.Tech 3rd Semester Exam., 2020 (New Course)

Time 03 Hours
Full Marks 70
Instructions:
  • The marks are indicated in the right-hand margin.
  • There are NINE questions in this paper.
  • Attempt FIVE questions in all.
  • Question No. 1 is compulsory.

Q.1 Answer the following questions (any seven) :

Q1.1

Why is negative feedback desired in amplifier application?

Q1.2

Draw the voltage transfer curve of op-amp.

Q1.3

State the Barkhausen's criteria for electronic system to oscillate with feedback.

Q1.4

How is amplifier different from the oscillator?

Q1.5

Why is the reception in the case of amplitude modulation usually noisy?

Q1.6

What is cell splitting and how does it increase the capacity of cellular network?

Q1.7

Justify that BJT is current controlled while FET is voltage-controlled device.

Q1.8

Name the breakdown mechanism in the lightly doped P-N junction diode under reverse biased condition.

Q1.9

Why is Gray code also called as reflected code? Convert (396)10(396)_{10} to Gray code.

Q1.10

For the logical circuit shown in the figure below, derive the simplified Boolean expression for output Y.

Q.2 Solve both questions :

Q2.1

Draw the waveform of output V0V_0 and explain the operation of circuit in the figure given below.

Q2.2

Calculate the value of R1R_1 in the biasing circuit in the figure given below, so that the Q-point is fixed at IC=8 mAI_C = 8 \text{ mA} and VCE=3 VV_{CE} = 3 \text{ V}.

Q.3 Solve both questions :

Q3.1

Calculate the maximum DC voltage and DC current available from a half-wave rectifier shown in the figure given below. What is the PIV of the diode used in the rectifier?

Q3.2

In the figure given below, calculate the load current ILI_L and Zener diode current $ I_Z $.

Q.4 Solve both questions :

Q4.1

Minimize the given Boolean function F using K map in SOP and implement using NAND gate: $ F(A,B,C,D) = AB\overline{C}D + \overline{A}BCD ++ \overline{A}\overline{B}\overline{C} + \overline{A}\overline{B}\overline{D} + A\overline{C} + A\overline{B}C + \overline{B}C $

Q4.2

The circuit given below is the basic application of op-amp to perform the addition operation: Explain the operation of circuit and derive the expression of output voltage.

Q.5 Solve both questions :

Q5.1

Design the voltage follower using op-amp and explain the operation.

Q5.2

Draw the circuit diagram of voltage-shunt feedback amplifier and derive the expression of closed-loop voltage gain.

Q.6 Solve both questions :

Q6.1

Draw the block diagram of cellular network and briefly explain its operation.

Q6.2

Draw the functional block diagram of AM transmitter and receiver.

Q.7 Solve both questions :

Q7.1

Design Schmitt trigger using IC 555 timer and explain its operation with the help of functional diagram.

Q7.2

Draw the basic circuit of an R-C phase-shift oscillator and explain its operation. If $ R_1=R_2=R_3=450 \text{ k}\Omega andand C_1=C_2=C_3=60 \text{ pF} $, determine the frequency of oscillation in phase-shift oscillator.

Q.8 Solve both questions :

Q8.1

A new clocked X-Y flip-flop is defined with inputs X and Y in addition to the clock input. The flip-flop functions are as follows: If XY=00XY=00 the flip-flop changes state with each clock pulse. If XY=01XY=01 the flip-flop state Q becomes 1 with the next clock pulse. If XY=10XY=10, the flip-flop state Q becomes 0 with the next clock pulse. If XY=11XY=11, no change of state occurs with the clock pulse. Write the truth table and excitation table of X-Y flip-flop. Implement the X-Y flip-flop using a J-K flip-flop.

Q8.2

What is the race around condition in J-K flip-flop? What are the methods to resolve the race around condition in J-K flip-flop? Explain each method with the help of example.

Q.9 Solve both questions :

Q9.1

What are the problems with normal encoder? How can these problems be solved by the priority decoder? Design 2 to 4 lines priority encoder.

Q9.2

Draw the block diagram of micro-controller and briefly explain each block.


2020 V3 100303

B.Tech 3rd Semester Exam., 2020 (New Course)

Time 03 Hours
Full Marks 70
Instructions:
  • The marks are indicated in the right-hand margin.
  • There are NINE questions in this paper.
  • Attempt FIVE questions in all.
  • Question No. 1 is compulsory.

Q.1 Answer the following questions (any seven) :

Q1.1

Why is negative feedback desired in amplifier application?

Q1.2

Draw the voltage transfer curve of op-amp.

Q1.3

State the Barkhausen's criteria for electronic system to oscillate with feedback.

Q1.4

How is amplifier different from the oscillator?

Q1.5

Why is the reception in the case of amplitude modulation usually noisy?

Q1.6

What is cell splitting and how does it increase the capacity of cellular network?

Q1.7

Justify that BJT is current controlled while FET is voltage-controlled device.

Q1.8

Name the breakdown mechanism in the lightly doped P-N junction diode under reverse biased condition.

Q1.9

Why is Gray code also called as reflected code? Convert $ (396)_{10} $ to Gray code.

Q1.10

For the logical circuit shown in the figure below, derive the simplified Boolean expression for output Y.

Question Diagram

Q.2 Solve both questions :

Q2.1

Draw the waveform of output $ V_0 $ and explain the operation of circuit in the figure given below.

Question Diagram
Q2.2

Calculate the value of $ R_1 $ in the biasing circuit in the figure given below, so that the Q-point is fixed at $ I_C = 8 \text{ mA} $ and $ V_{CE} = 3 \text{ V} $.

Question Diagram

Q.3 Solve both questions :

Q3.1

Calculate the maximum DC voltage and DC current available from a half-wave rectifier shown in the figure given below. What is the PIV of the diode used in the rectifier?

Question Diagram
Q3.2

In the figure given below, calculate the load current $ I_L $ and Zener diode current $ I_Z $.

Question Diagram

Q.4 Solve both questions :

Q4.1

Minimize the given Boolean function F using K map in SOP and implement using NAND gate: $ F(A,B,C,D) = AB\overline{C}D + \overline{A}BCD $ + $ \overline{A}\overline{B}\overline{C} + \overline{A}\overline{B}\overline{D} + A\overline{C} + A\overline{B}C + \overline{B}C $

Q4.2

The circuit given below is the basic application of op-amp to perform the addition operation: Explain the operation of circuit and derive the expression of output voltage.

Question Diagram

Q.5 Solve both questions :

Q5.1

Design the voltage follower using op-amp and explain the operation.

Q5.2

Draw the circuit diagram of voltage-shunt feedback amplifier and derive the expression of closed-loop voltage gain.

Q.6 Solve both questions :

Q6.1

Draw the block diagram of cellular network and briefly explain its operation.

Q6.2

Draw the functional block diagram of AM transmitter and receiver.

Q.7 Solve both questions :

Q7.1

Design Schmitt trigger using IC 555 timer and explain its operation with the help of functional diagram.

Q7.2

Draw the basic circuit of an R-C phase-shift oscillator and explain its operation. If $ R_1=R_2=R_3=450 \text{ k}\Omega $ and $ C_1=C_2=C_3=60 \text{ pF} $, determine the frequency of oscillation in phase-shift oscillator.

Q.8 Solve both questions :

Q8.1

A new clocked X-Y flip-flop is defined with inputs X and Y in addition to the clock input. The flip-flop functions are as follows:
If $ XY=00 $ the flip-flop changes state with each clock pulse.
If $ XY=01 $ the flip-flop state Q becomes 1 with the next clock pulse.
If $ XY=10 $, the flip-flop state Q becomes 0 with the next clock pulse.
If $ XY=11 $, no change of state occurs with the clock pulse.
Write the truth table and excitation table of X-Y flip-flop. Implement the X-Y flip-flop using a J-K flip-flop.

Q8.2

What is the race around condition in J-K flip-flop? What are the methods to resolve the race around condition in J-K flip-flop? Explain each method with the help of example.

Q.9 Solve both questions :

Q9.1

What are the problems with normal encoder? How can these problems be solved by the priority decoder? Design 2 to 4 lines priority encoder.

Q9.2

Draw the block diagram of micro-controller and briefly explain each block.


2020 V4 100303

B.Tech 3rd Semester Exam., 2020 (New Course)

Time 03 Hours
Full Marks 70
Instructions:
  • The marks are indicated in the right-hand margin.
  • There are NINE questions in this paper.
  • Attempt FIVE questions in all.
  • Question No. 1 is compulsory.

Q.1 Answer the following questions (any seven) :

Q1.1

Why is negative feedback desired in amplifier application?

Q1.2

Draw the voltage transfer curve of op-amp.

Q1.3

State the Barkhausen's criteria for electronic system to oscillate with feedback.

Q1.4

How is amplifier different from the oscillator?

Q1.5

Why is the reception in the case of amplitude modulation usually noisy?

Q1.6

What is cell splitting and how does it increase the capacity of cellular network?

Q1.7

Justify that BJT is current controlled while FET is voltage-controlled device.

Q1.8

Name the breakdown mechanism in the lightly doped P-N junction diode under reverse biased condition.

Q1.9

Why is Gray code also called as reflected code? Convert (396)10(396)_{10} to Gray code.

Q1.10

For the logical circuit shown in the figure below, derive the simplified Boolean expression for output Y.

Q.2 Solve both questions :

Q2.1

Draw the waveform of output V0V_0 and explain the operation of circuit in the figure given below.

Q2.2

Calculate the value of R1R_1 in the biasing circuit in the figure given below, so that the Q-point is fixed at IC=8 mAI_C = 8 \text{ mA} and VCE=3 VV_{CE} = 3 \text{ V}.

Q.3 Solve both questions :

Q3.1

Calculate the maximum DC voltage and DC current available from a half-wave rectifier shown in the figure given below. What is the PIV of the diode used in the rectifier?

Q3.2

In the figure given below, calculate the load current ILI_L and Zener diode current $ I_Z $.

Q.4 Solve both questions :

Q4.1

Minimize the given Boolean function F using K map in SOP and implement using NAND gate: $ F(A,B,C,D) = AB\overline{C}D + \overline{A}BCD ++ \overline{A}\overline{B}\overline{C} + \overline{A}\overline{B}\overline{D} + A\overline{C} + A\overline{B}C + \overline{B}C $

Q4.2

The circuit given below is the basic application of op-amp to perform the addition operation: Explain the operation of circuit and derive the expression of output voltage.

Q.5 Solve both questions :

Q5.1

Design the voltage follower using op-amp and explain the operation.

Q5.2

Draw the circuit diagram of voltage-shunt feedback amplifier and derive the expression of closed-loop voltage gain.

Q.6 Solve both questions :

Q6.1

Draw the block diagram of cellular network and briefly explain its operation.

Q6.2

Draw the functional block diagram of AM transmitter and receiver.

Q.7 Solve both questions :

Q7.1

Design Schmitt trigger using IC 555 timer and explain its operation with the help of functional diagram.

Q7.2

Draw the basic circuit of an R-C phase-shift oscillator and explain its operation. If $ R_1=R_2=R_3=450 \text{ k}\Omega andand C_1=C_2=C_3=60 \text{ pF} $, determine the frequency of oscillation in phase-shift oscillator.

Q.8 Solve both questions :

Q8.1

A new clocked X-Y flip-flop is defined with inputs X and Y in addition to the clock input. The flip-flop functions are as follows:
If XY=00XY=00 the flip-flop changes state with each clock pulse.
If XY=01XY=01 the flip-flop state Q becomes 1 with the next clock pulse.
If XY=10XY=10, the flip-flop state Q becomes 0 with the next clock pulse.
If XY=11XY=11, no change of state occurs with the clock pulse.
Write the truth table and excitation table of X-Y flip-flop. Implement the X-Y flip-flop using a J-K flip-flop.

Q8.2

What is the race around condition in J-K flip-flop? What are the methods to resolve the race around condition in J-K flip-flop? Explain each method with the help of example.

Q.9 Solve both questions :

Q9.1

What are the problems with normal encoder? How can these problems be solved by the priority decoder? Design 2 to 4 lines priority encoder.

Q9.2

Draw the block diagram of micro-controller and briefly explain each block.


2020 V6 100303

B.Tech 3rd Semester Exam., 2020 (New Course)

Time 03 Hours
Full Marks 70
Instructions:
  • The marks are indicated in the right-hand margin.
  • There are NINE questions in this paper.
  • Attempt FIVE questions in all.
  • Question No. 1 is compulsory.

Q.1 Answer the following questions (any seven) :

Q1.1

Why is negative feedback desired in amplifier application?

Q1.2

Draw the voltage transfer curve of op-amp.

Q1.3

State the Barkhausen's criteria for electronic system to oscillate with feedback.

Q1.4

How is amplifier different from the oscillator?

Q1.5

Why is the reception in the case of amplitude modulation usually noisy?

Q1.6

What is cell splitting and how does it increase the capacity of cellular network?

Q1.7

Justify that BJT is current controlled while FET is voltage-controlled device.

Q1.8

Name the breakdown mechanism in the lightly doped P-N junction diode under reverse biased condition.

Q1.9

Why is Gray code also called as reflected code? Convert (396)10(396)_{10} to Gray code.

Q1.10

For the logical circuit shown in the figure below, derive the simplified Boolean expression for output Y.

Q.2 Solve both questions :

Q2.1

Draw the waveform of output V0V_0 and explain the operation of circuit in the figure given below.

Q2.2

Calculate the value of R1R_1 in the biasing circuit in the figure given below, so that the Q-point is fixed at IC=8 mAI_C = 8 \text{ mA} and VCE=3 VV_{CE} = 3 \text{ V}.

Q.3 Solve both questions :

Q3.1

Calculate the maximum DC voltage and DC current available from a half-wave rectifier shown in the figure given below. What is the PIV of the diode used in the rectifier?

Q3.2

In the figure given below, calculate the load current ILI_L and Zener diode current $ I_Z $.

Q.4 Solve both questions :

Q4.1

Minimize the given Boolean function F using K map in SOP and implement using NAND gate: $ F(A,B,C,D) = AB\overline{C}D + \overline{A}BCD ++ \overline{A}\overline{B}\overline{C} + \overline{A}\overline{B}\overline{D} + A\overline{C} + A\overline{B}C + \overline{B}C $

Q4.2

The circuit given below is the basic application of op-amp to perform the addition operation: Explain the operation of circuit and derive the expression of output voltage.

Q.5 Solve both questions :

Q5.1

Design the voltage follower using op-amp and explain the operation.

Q5.2

Draw the circuit diagram of voltage-shunt feedback amplifier and derive the expression of closed-loop voltage gain.

Q.6 Solve both questions :

Q6.1

Draw the block diagram of cellular network and briefly explain its operation.

Q6.2

Draw the functional block diagram of AM transmitter and receiver.

Q.7 Solve both questions :

Q7.1

Design Schmitt trigger using IC 555 timer and explain its operation with the help of functional diagram.

Q7.2

Draw the basic circuit of an R-C phase-shift oscillator and explain its operation. If $ R_1=R_2=R_3=450 \text{ k}\Omega andand C_1=C_2=C_3=60 \text{ pF} $, determine the frequency of oscillation in phase-shift oscillator.

Q.8 Solve both questions :

Q8.1

A new clocked X-Y flip-flop is defined with inputs X and Y in addition to the clock input. The flip-flop functions are as follows:
If XY=00XY=00 the flip-flop changes state with each clock pulse.
If XY=01XY=01 the flip-flop state Q becomes 1 with the next clock pulse.
If XY=10XY=10, the flip-flop state Q becomes 0 with the next clock pulse.
If XY=11XY=11, no change of state occurs with the clock pulse.
Write the truth table and excitation table of X-Y flip-flop. Implement the X-Y flip-flop using a J-K flip-flop.

Q8.2

What is the race around condition in J-K flip-flop? What are the methods to resolve the race around condition in J-K flip-flop? Explain each method with the help of example.

Q.9 Solve both questions :

Q9.1

What are the problems with normal encoder? How can these problems be solved by the priority decoder? Design 2 to 4 lines priority encoder.

Q9.2

Draw the block diagram of micro-controller and briefly explain each block.


2020 V7 100303

B.Tech 3rd Semester Exam., 2020

Time 3 hours
Full Marks 70
Instructions:
  • The marks are indicated in the right-hand margin.
  • There are NINE questions in this paper.
  • Attempt FIVE questions in all.
  • Question No. 1 is compulsory.

Q.1 Answer the following questions (any seven):

Q1.1

Why is negative feedback desired in amplifier application?

Q1.2

Draw the voltage transfer curve of op-amp.

Q1.3

State the Barkhausen's criteria for electronic system to oscillate with feedback.

Q1.4

How is amplifier different from the oscillator?

Q1.5

Why is the reception in the case of amplitude modulation usually noisy?

Q1.6

What is cell splitting and how does it increase the capacity of cellular network?

Q1.7

Justify that BJT is current controlled while FET is voltage-controlled device.

Q1.8

Name the breakdown mechanism in the lightly doped P-N junction diode under reverse biased condition.

Q1.9

Why is Gray code also called as reflected code? Convert $(396)_{10}$ to Gray code.

Q1.10

For the logical circuit shown in the figure, derive the simplified Boolean expression for output Y.

Question Diagram

Q.2 Solve both questions:

Q2.1

Draw the waveform of output $V_{0}$ and explain the operation of circuit with AC source $V_i$, Resistor R, Parallel diode clippers with bias voltages $V_{R1}$ and $V_{R2}$.

Question Diagram
Q2.2

In the given circuit, calculate the load current $I_{L}$ and Zener diode current $I_{Z}$ with 20V source, 1k$\Omega$ resistor, 5V Zener diode, 1.2k$\Omega$ Load $R_L$.

Question Diagram

Q.3 Solve both questions:

Q3.1

Calculate the maximum DC voltage and DC current available from a half-wave rectifier. What is the PIV of the diode used in the rectifier?

Question Diagram
Q3.2

Calculate the value of $R_{1}$ in the biasing circuit, so that the Q-point is fixed at $I_{C}=8~mA$ and $V_{CE}=3~V$ with $-V_{CC} = -9V$, 250$\Omega$ collector resistor, 500$\Omega$ emitter resistor, $\beta=80$.

Question Diagram

Q.4 Solve both questions:

Q4.1

Minimize the given Boolean function F using K map in SOP and implement using NAND gate: $F(A,B,C,D)=AB\overline{C}D+\overline{A}BCD+\overline{A}\overline{B}\overline{C} $ + $ \overline{A}\overline{B}\overline{D}+A\overline{C}+A\overline{B}C+\overline{B}C$

Q4.2

The circuit given is the basic application of op-amp to perform the addition operation. Explain the operation of circuit and derive the expression of output voltage.

Question Diagram

Q.5 Solve both questions:

Q5.1

Design the voltage follower using op-amp and explain the operation.

Q5.2

Draw the circuit diagram of voltage-shunt feedback amplifier and derive the expression of closed-loop voltage gain.

Q.6 Solve both questions:

Q6.1

Draw the block diagram of cellular network and briefly explain its operation.

Q6.2

Draw the functional block diagram of AM transmitter and receiver.

Q.7 Solve both questions:

Q7.1

Design Schmitt trigger using IC 555 timer and explain its operation with the help of functional diagram.

Q7.2

If $R_{1}=R_{2}=R_{3}=450~k\Omega$ and $C_{1}=C_{2}=C_{3}=60pF$, determine the frequency of oscillation in phase-shift oscillator. Draw the basic circuit of an R-C phase-shift oscillator and explain its operation.

Q.8 Solve both questions:

Q8.1

A new clocked X-Y flip-flop is defined with inputs X and Y in addition to the clock input. The flip-flop functions are as follows:
If XY=00 the flip-flop changes state with each clock pulse.
If XY=01 the flip-flop state Q becomes 1 with the next clock pulse.
If XY=10, the flip-flop state Q becomes 0 with the next clock pulse.
If XY=11, no change of state occurs with the clock pulse.
Write the truth table and excitation table of X-Y flip-flop. Implement the X-Y flip-flop using a J-K flip-flop.

Q8.2

What is the race around condition in J-K flip-flop? What are the methods to resolve the race around condition in J-K flip-flop? Explain each method with the help of example.

Q.9 Solve both questions:

Q9.1

What are the problems with normal encoder? How can these problems be solved by the priority decoder? Design 2 to 4 lines priority encoder.

Q9.2

Draw the block diagram of micro-controller and briefly explain each block.


2020 V8 100303

B.Tech 3rd Semester Exam., 2020 (New Course)

Time 03 Hours
Full Marks 70
Instructions:
  • The marks are indicated in the right-hand margin.
  • There are NINE questions in this paper.
  • Attempt FIVE questions in all.
  • Question No. 1 is compulsory.

Q.1 Answer the following questions (any seven) :

Q1.1

Why is negative feedback desired in amplifier application?

Q1.2

Draw the voltage transfer curve of op-amp.

Q1.3

State the Barkhausen's criteria for electronic system to oscillate with feedback.

Q1.4

How is amplifier different from the oscillator?

Q1.5

Why is the reception in the case of amplitude modulation usually noisy?

Q1.6

What is cell splitting and how does it increase the capacity of cellular network?

Q1.7

Justify that BJT is current controlled while FET is voltage-controlled device.

Q1.8

Name the breakdown mechanism in the lightly doped P-N junction diode under reverse biased condition.

Q1.9

Why is Gray code also called as reflected code? Convert $ (396)_{10} $ to Gray code.

Q1.10

For the logical circuit shown in the figure below, derive the simplified Boolean expression for output Y.

Question Diagram

Q.2 Solve both questions :

Q2.1

Draw the waveform of output $ V_0 $ and explain the operation of circuit in the figure given below.

Question Diagram
Q2.2

Calculate the value of $ R_1 $ in the biasing circuit in the figure given below, so that the Q-point is fixed at $ I_C = 8 \text{ mA} $ and $ V_{CE} = 3 \text{ V} $.

Question Diagram

Q.3 Solve both questions :

Q3.1

Calculate the maximum DC voltage and DC current available from a half-wave rectifier shown in the figure given below. What is the PIV of the diode used in the rectifier?

Question Diagram
Q3.2

In the figure given below, calculate the load current $ I_L $ and Zener diode current $ I_Z $.

Question Diagram

Q.4 Solve both questions :

Q4.1

Minimize the given Boolean function F using K map in SOP and implement using NAND gate: $ F(A,B,C,D) = AB\overline{C}D + \overline{A}BCD $ + $ \overline{A}\overline{B}\overline{C} + \overline{A}\overline{B}\overline{D} + A\overline{C} + A\overline{B}C + \overline{B}C $

Q4.2

The circuit given below is the basic application of op-amp to perform the addition operation: Explain the operation of circuit and derive the expression of output voltage.

Question Diagram

Q.5 Solve both questions :

Q5.1

Design the voltage follower using op-amp and explain the operation.

Q5.2

Draw the circuit diagram of voltage-shunt feedback amplifier and derive the expression of closed-loop voltage gain.

Q.6 Solve both questions :

Q6.1

Draw the block diagram of cellular network and briefly explain its operation.

Q6.2

Draw the functional block diagram of AM transmitter and receiver.

Q.7 Solve both questions :

Q7.1

Design Schmitt trigger using IC 555 timer and explain its operation with the help of functional diagram.

Q7.2

Draw the basic circuit of an R-C phase-shift oscillator and explain its operation. If $ R_1=R_2=R_3=450 \text{ k}\Omega $ and $ C_1=C_2=C_3=60 \text{ pF} $, determine the frequency of oscillation in phase-shift oscillator.

Q.8 Solve both questions :

Q8.1

A new clocked X-Y flip-flop is defined with inputs X and Y in addition to the clock input. The flip-flop functions are as follows:
If $ XY=00 $ the flip-flop changes state with each clock pulse.
If $ XY=01 $ the flip-flop state Q becomes 1 with the next clock pulse.
If $ XY=10 $, the flip-flop state Q becomes 0 with the next clock pulse.
If $ XY=11 $, no change of state occurs with the clock pulse.
Write the truth table and excitation table of X-Y flip-flop. Implement the X-Y flip-flop using a J-K flip-flop.

Q8.2

What is the race around condition in J-K flip-flop? What are the methods to resolve the race around condition in J-K flip-flop? Explain each method with the help of example.

Q.9 Solve both questions :

Q9.1

What are the problems with normal encoder? How can these problems be solved by the priority decoder? Design 2 to 4 lines priority encoder.

Q9.2

Draw the block diagram of micro-controller and briefly explain each block.


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