2025 100209

B.Tech 2nd Semester Examination, 2025

Time 03 Hours
Full Marks 70
Instructions:
  • The marks are indicated in the right-hand margin.
  • There are NINE questions in this paper.
  • Attempt FIVE questions in all.
  • Question No. 1 is compulsory.

Q.1 Choose the correct option / answer the following (Any seven question only):

Q1.1

When a pure semiconductor is heated, its resistance will

a)

Goes up

b)

Remains the same

c)

Goes down

d)

None

Q1.2

The random motion of holes and free electrons due to thermal agitation is called

a)

Diffusion

b)

Ionisation

c)

Pressure

d)

None of these

Q1.3

A zener diode is used as

a)

An amplifier

b)

A rectifier

c)

A voltage regulator

d)

A multivibrator

Q1.4

The ripple factor of a half-wave rectifier is

a)

2

b)

0.48

c)

1.21

d)

None

Q1.5

The number of depletion layers in a transistor is

a)

Four

b)

Two

c)

Three

d)

One

Q1.6

In a transistor, $ I_{C}=100~mA $ and $ I_{E}=100.2~mA $. The value of $ \beta $ is

a)

100

b)

50

c)

1

d)

200

Q1.7

A non inverting closed loop op-amp circuit generally has a gain factor

a)

Less than one

b)

Greater than one

c)

Zero

d)

Equal to one

Q1.8

If ground is applied to the (+) terminal of an inverting op-amp, the (-) terminal will

a)

Not need an input resistor

b)

Be virtual ground

c)

Have high reverse current

d)

Not invert the signal

Q1.9

The binary code of (21.125) is

a)

10101.001

b)

10101.010

c)

10100.001

d)

10100.111

Q1.10

Which of the following gate is a two-level logic gate

a)

OR gate

b)

EXCLUSIVE OR gate

c)

NAND gate

d)

NOT gate

Q.2 Solve both questions :

Q2.1

Explain the working of p-n junction diode and draw its V-I Characteristics.

Q2.2

Draw a neat circuit diagram of bridge rectifier and explain its operation with output waveforms. Derive the average value of current and voltage.

Q.3 Solve both questions :

Q3.1

Explain working principle of Depletion type MOSFET (n-channel). Draw & Explain its characteristics.

Q3.2

Explain the working principle and characteristics of a full-wave rectifier. Derive the expressions for output voltage and ripple factor for a full-wave rectifier.

Q.4 Solve both questions :

Q4.1

Draw the block diagram of Op-Amp and list all the ideal characteristics of op-amp.

Q4.2

Explain the working of op-amp as an Integrator and derive its output equation.

Q.5 Solve both questions :

Q5.1

Draw the circuit of NPN transistor in common base configuration and discuss its working. Draw input-output characteristic.

Q5.2

Explain the output and transfer characteristics of a JFET. How does the gate-source voltage $ (V_{GS}) $ affect the drain current $ (I_D) $?

Q.6 Solve both questions :

Q6.1

Convert the following:
(i) $ (53.625)_{10} $ to $ (?)_{2} $
(ii) Find the base x if $ (211)_{x}=(152)_{8} $
(iii) Subtract using 1's complement: $ (10111) - (110011) $
(iv) Find the 1's and 2's compliment of $ (010100)_2 $

Q6.2

Discuss the working of basic logic gates: NAND, NOR, XOR. Derive the truth tables and Boolean expressions for each gate.

Q.7 Solve both questions :

Q7.1

Explain the concept of load line analysis in a BJT. Derive the expressions for the load line and operating point. Explain their significance in amplifier design.

Q7.2

Explain the difference between intrinsic and extrinsic semiconductors. How does the addition of impurities affect the electrical properties of semiconductors?

Q.8 Solve both questions :

Q8.1

Discuss the working principle of clipping circuits. What are the different types of clipping circuits?

Q8.2

Explain the concepts of static and dynamic resistance in a diode. Derive expressions for both and discuss their significance in diode operation.

Q.9 Write short notes on any two of the following:

Q9.1

Solar cell

Q9.2

Basic logic gates, their symbols and truth tables

Q9.3

Clipping and Clamping circuits

Q9.4

Transistor biasing techniques


2025 V4 100209

B.Tech 2nd Semester Examination, 2025

Time 03 Hours
Full Marks 70
Instructions:
  • The marks are indicated in the right-hand margin.
  • There are NINE questions in this paper.
  • Attempt FIVE questions in all.
  • Question No. 1 is compulsory.

Q.1 Choose the correct option / answer the following (Any seven question only):

Q1.1

When a pure semiconductor is heated, its resistance will

a)

Goes up

b)

Remains the same

c)

Goes down

d)

None

Q1.2

The random motion of holes and free electrons due to thermal agitation is called

a)

Diffusion

b)

Ionisation

c)

Pressure

d)

None of these

Q1.3

A zener diode is used as

a)

An amplifier

b)

A rectifier

c)

A voltage regulator

d)

A multivibrator

Q1.4

The ripple factor of a half-wave rectifier is

a)

2

b)

0.48

c)

1.21

d)

None

Q1.5

The number of depletion layers in a transistor is

a)

Four

b)

Two

c)

Three

d)

One

Q1.6

In a transistor, $ I_{C}=100~mA $ and $ I_{E}=100.2~mA $. The value of $ \beta $ is

a)

100

b)

50

c)

1

d)

200

Q1.7

A non inverting closed loop op-amp circuit generally has a gain factor

a)

Less than one

b)

Greater than one

c)

Zero

d)

Equal to one

Q1.8

If ground is applied to the (+) terminal of an inverting op-amp, the (-) terminal will

a)

Not need an input resistor

b)

Be virtual ground

c)

Have high reverse current

d)

Not invert the signal

Q1.9

The binary code of (21.125) is

a)

10101.001

b)

10101.010

c)

10100.001

d)

10100.111

Q1.10

Which of the following gate is a two-level logic gate

a)

OR gate

b)

EXCLUSIVE OR gate

c)

NAND gate

d)

NOT gate

Q.2 Solve both questions :

Q2.1

Explain the working of p-n junction diode and draw its V-I Characteristics.

Q2.2

Draw a neat circuit diagram of bridge rectifier and explain its operation with output waveforms. Derive the average value of current and voltage.

Q.3 Solve both questions :

Q3.1

Explain working principle of Depletion type MOSFET (n-channel). Draw & Explain its characteristics.

Q3.2

Explain the working principle and characteristics of a full-wave rectifier. Derive the expressions for output voltage and ripple factor for a full-wave rectifier.

Q.4 Solve both questions :

Q4.1

Draw the block diagram of Op-Amp and list all the ideal characteristics of op-amp.

Q4.2

Explain the working of op-amp as an Integrator and derive its output equation.

Q.5 Solve both questions :

Q5.1

Draw the circuit of NPN transistor in common base configuration and discuss its working. Draw input-output characteristic.

Q5.2

Explain the output and transfer characteristics of a JFET. How does the gate-source voltage $ (V_{GS}) $ affect the drain current $ (I_D) $?

Q.6 Solve both questions :

Q6.1

Convert the following:
(i) $ (53.625)_{10} $ to $ (?)_{2} $
(ii) Find the base x if $ (211)_{x}=(152)_{8} $
(iii) Subtract using 1's complement: $ (10111) - (110011) $
(iv) Find the 1's and 2's compliment of $ (010100)_2 $

Q6.2

Discuss the working of basic logic gates: NAND, NOR, XOR. Derive the truth tables and Boolean expressions for each gate.

Q.7 Solve both questions :

Q7.1

Explain the concept of load line analysis in a BJT. Derive the expressions for the load line and operating point. Explain their significance in amplifier design.

Q7.2

Explain the difference between intrinsic and extrinsic semiconductors. How does the addition of impurities affect the electrical properties of semiconductors?

Q.8 Solve both questions :

Q8.1

Discuss the working principle of clipping circuits. What are the different types of clipping circuits?

Q8.2

Explain the concepts of static and dynamic resistance in a diode. Derive expressions for both and discuss their significance in diode operation.

Q.9 Write short notes on any two of the following:

Q9.1

Solar cell

Q9.2

Basic logic gates, their symbols and truth tables

Q9.3

Clipping and Clamping circuits

Q9.4

Transistor biasing techniques


2023 101302

B.Tech. 3rd Semester Examination, 2023

Time 03 Hours
Full Marks 70
Instructions:
  • The marks are indicated in the right-hand margin.
  • There are NINE questions in this paper.
  • Attempt FIVE questions in all.
  • Question No. 1 is compulsory.

Section A

Q1

Choose the correct answer of the following (Any seven question only) :

a)

The average value of the full-wave rectified sine wave with period π\pi and a peak value of VmV_m is

a)

0.707Vm0.707 V_m

b)

0.5Vm0.5 V_m

c)

0.637Vm0.637 V_m

d)

0.318Vm0.318 V_m

[2 Marks]
b)

The most commonly used transistor configuration for use as a switching device is

a)

Common-base configuration

b)

Common-collector configuration

c)

Collector-emitter shorted configuration

d)

Common-emitter configuration

[2 Marks]
c)

The Gunn diode is made of

a)

Silicon

b)

Germanium

c)

Gallium Arsenide

d)

Selenium

[2 Marks]
d)

If for a silicon N-P-N transistor, the base - to - emitter voltage is 0.7V and the collector - to - base voltage is 0.2V, then the transistor is operating in the

a)

Active region

b)

Saturation region

c)

Reverse active region

d)

Cut-off region

[2 Marks]
e)

What current does I=Aq(DpLppn+DnLnnp)I = Aq(\frac{D_p}{L_p}p_n + \frac{D_n}{L_n}n_p) represent in pn junction diode?

a)

Forward current

b)

Diffusion current

c)

Drift current

d)

Reverse saturation current

[2 Marks]
f)

For normal operation of a transistor,

a)

Forward bias the emitter diode and reverse bias the collector diode

b)

Forward bias the emitter diode as well as the collector diode

c)

Reverse bias the emitter diode as well as the collector diode

d)

Reverse bias the emitter diode and forward bias the collector diode

[2 Marks]
g)

Transistor is in saturation when

a)

IB=ICI_B = I_C

b)

IB>ICβdcI_B > \frac{I_C}{\beta_{dc}}

c)

IB=0I_B = 0

d)

IB<ICβdcI_B < \frac{I_C}{\beta_{dc}}

[2 Marks]
h)

If a differential amplifier has a gain of 20,000 and CMRR = 80 dB, its common mode gain is

a)

2

b)

1

c)

1/2

d)

0

[2 Marks]
i)

An operational amplifier possesses

a)

Very large input resistance and very large output resistance

b)

Very large input resistance and very small output resistance

c)

Very small input resistance and very small output resistance

d)

Very small input resistance and very large output resistance

[2 Marks]
j)

If the input ($V_{in}$) to the circuit is a sine wave, the output will be : [Diagram: A diode circuit taking input $V_{in}$]

a)

Half-wave rectified sine wave

b)

Full-wave rectified sine wave

c)

Triangular wave

d)

Square wave

[2 Marks]
[14 Marks]

Section B

Q2

Answer the following:

a)

With a neat circuit diagram and waveform, explain the working of bridge rectifier.

[7 Marks]
b)

Explain Zener diode as voltage regular with no load.

[7 Marks]
Q3

Answer the following:

a)

Explain the operation of enhancement MOSFET.

[7 Marks]
b)

Draw the DC load line for transistor and identify Q point.

[7 Marks]
Q4

Answer the following:

a)

With a neat circuit diagram, explain the working of wein bridge oscillator using op-Amp.

[7 Marks]
b)

Explain common base input characteristic of BJT.

[7 Marks]
Q5

Answer the following:

a)

An amplifier with open loop voltage gain Av=1000±100A_v = 1000 \pm 100 is available. It is required to have amplifier whose gain varies by not more than ±0.2%\pm 0.2\%. Find (i) Reverse transmission factor β\beta of the feedback network, (ii) Gain with feedback.

[7 Marks]
b)

Define, four basic ways of connection the feedback signal. Such as voltage-series feedback, voltage-shunt feedback, current-series feedback, current-shunt feedback.

[7 Marks]
Q6

Answer the following:

a)

Explain the differences between BJT & FET.

[7 Marks]
b)

Calculate the output voltage VoV_o of the circuit shown in figure. The input voltages are V1=2.5VV_1 = 2.5V and V2=1VV_2 = 1V. [Diagram: Summing/difference op-amp circuit with V1V_1 to 1k, V2V_2 to 3.3k, non-inverting terminal to 1.5k, and feedback resistor 2.2k.]

[7 Marks]
Q7

Draw and explain pin configuration of 741 OP-Amp.

[14 Marks]
Q8

What is an SCR? Explain its working with switching characteristics.

[14 Marks]
Q9

Write short notes on any two of the following :

a)

Differential amplifier

[7 Marks]
b)

Explain positive half wave rectifier with input and output waveforms

[7 Marks]
c)

Define OP-Amp parameter Gain, CMRR, Slew rate, Input Resistance.

[7 Marks]
d)

Explain inverting amplifier.

[7 Marks]
[14 Marks]

2023 104301

B.Tech 3rd Semester Examination, 2023

Time 03 Hours
Full Marks 70
Instructions:
  • The marks are indicated in the right-hand margin.
  • There are NINE questions in this paper.
  • Attempt FIVE questions in all.
  • Question No. 1 is compulsory.

Section A

Q1

Answer the following questions (any seven only):

a)

Define Doping.

[2 Marks]
b)

What are the two types of extrinsic semiconductors?

[2 Marks]
c)

Write any two differences between Zener breakdown and Avalanche breakdown.

[2 Marks]
d)

What materials are used to construct an LED?

[2 Marks]
e)

What is transistor? Give its circuit symbol.

[2 Marks]
f)

Give the relation between α\alpha and β\beta.

[2 Marks]
g)

Why base made thin in BJT?

[2 Marks]
h)

What are the applications of JFET?

[2 Marks]
i)

What are the differences between JFET and MOSFET?

[2 Marks]
j)

Write Shockley's equation.

[2 Marks]
[14 Marks]

Section B

Q2

Answer the following:

a)

With a neat diagrams explain the working of a PN junction diode in forward bias and reverse bias and plot the V-I characteristics.

[7 Marks]
b)

Explain the switching characteristic of PN junction diode.

[7 Marks]
Q3

Answer the following:

a)

Draw and Explain V-I characteristics of Zener diode.

[7 Marks]
b)

With neat diagram explain the construction and working of LED.

[7 Marks]
Q4

Answer the following:

a)

With a neat sketch explain the operation of CLC (ie π\pi section) and LC filter.

[7 Marks]
b)

Describe the working principle of full wave rectifier with centre tapped transformer and derive the expressions for the ripple factor and efficiency.

[7 Marks]
Q5

Answer the following:

a)

Explain the working of NPN and PNP transistor.

[7 Marks]
b)

Draw and explain the input and output characteristics of a transistor in CC configuration.

[7 Marks]
Q6

Answer the following:

a)

Explain Zener Diode as a Voltage Regulator.

[7 Marks]
b)

Explain the working of positive clamping circuit.

[7 Marks]
Q7

Explain the construction, working and operating characteristics of N-Channel JFET's with relevant diagrams.

[14 Marks]
Q8

Describe the kind of operation that takes place in the enhancement mode MOSFET. How does this differ from depletion mode type?

[14 Marks]
Q9

Write Short notes on any two of the following:

a)

Characteristics of an Ideal Operational Amplifier

[7 Marks]
b)

Difference between Inverting and non inverting amplifier

[7 Marks]
c)

Effects of negative feedback in amplifiers

[7 Marks]
d)

Various topologies of feedback amplifier

[7 Marks]
[14 Marks]

2022 104301

End Semester Examination - 2022

Time 03 Hours
Full Marks 70
Instructions:
  • The marks are indicated in the right-hand margin.
  • There are NINE questions in this paper.
  • Attempt FIVE questions in all.
  • Question No. 1 is compulsory.

Section A

Q1

Choose the correct answer of the following (Any seven question only) :

a)

What is the ripple factor of a half-wave rectifier?

a)

0.31

b)

0.48

c)

0.707

d)

1.21

[2 Marks]
b)

Which of the following is true in construction of a transistor?

a)

The collector dissipates lesser power

b)

The emitter supplies minority carriers

c)

The collector is made physically larger than the emitter region

d)

The collector collects minority charge carries

[2 Marks]
c)

For what kind of amplifications can the active region of the common-emitter configuration be used?

a)

Voltage

b)

Current

c)

Power

d)

All of the above

[2 Marks]
d)

The leakage current in a pn junction is of the order of

a)

A

b)

mA

c)

kA

d)

μA\mu A

[2 Marks]
e)

A zener diode is always .......... connected.

a)

reverse

b)

forward

c)

either reverse or forward

d)

none of the above

[2 Marks]
f)

The effective channel length of MOSFET in saturation decreases with increase in

a)

Gate voltage

b)

Drain voltage

c)

Source voltage

d)

Body voltage

[2 Marks]
g)

A BJT with β=50\beta = 50 has base to collector leakage current ICBOI_{CBO} of 2.5μA2.5 \mu A. If the transistor is connected in CE configuration, the collector current for IB=0I_B = 0 is.

a)

0.05μA0.05 \mu A

b)

0.1275mA0.1275 mA

c)

0.157mA0.157 mA

d)

0.516mA0.516 mA

[2 Marks]
h)

The threshold voltage of an n-channel enhancement type MOSFET is 0.5 V. When the device is biased at a gate voltage of 3 V, pinch-off would occur at a drain voltage of :

a)

2V

b)

2.5V

c)

3V

d)

1.5V

[2 Marks]
i)

In an op-amp, the input impedance is .......... and the output impedance is .......... .

a)

High, high

b)

Low, low

c)

High, low

d)

Low, high

[2 Marks]
j)

A MOSFET can be operated with .......... .

a)

negative gate voltage only

b)

positive gate voltage only

c)

positive as well as negative gate voltage

d)

None of the above

[2 Marks]
[14 Marks]

Section B

Q2

Answer the following:

a)

Draw the diagram & Explain the working of full-wave rectifier with filter.

[7 Marks]
b)

A half-wave rectifier is used to supply 50V d.c. to a resistive load of 800Ω800 \Omega. The diode has a resistance of 25Ω25 \Omega. Calculate the a.c. voltage required.

[7 Marks]
Q3

Answer the following:

a)

Explain the working of current series feedback amplifier with the help of block diagram.

[8 Marks]
b)

Explain about the distortions present in amplifier. List advantages of negative feedback.

[6 Marks]
Q4

Answer the following:

a)

Draw V-I characteristics curves of JFET and mark various regions Explain how FET is voltage controlled device.

[8 Marks]
b)

Draw the block diagram and explain the operation of sweep frequency generator.

[6 Marks]
Q5

Answer the following:

a)

Draw the cross-sectional view of an n-p-n transistor and explain its operation in active region of operation. What are the different current components of the transistor? How can one use a transistor as amplifier?

[7 Marks]
b)

Define αdc\alpha_{dc} and βdc\beta_{dc}. Derive the relationship between αdc\alpha_{dc} and βdc\beta_{dc}. If the base current in a transistor is 30μA30 \mu A, when the emitter current is 7.2mA7.2 mA, what are the values of αdc\alpha_{dc} and βdc\beta_{dc}? Also, calculate the collector current.

[7 Marks]
Q6

Answer the following:

a)

Draw and explain the input and output characteristics of CB configuration. Where can we use the CB configuration in a transistor circuit? Explain with proper justification.

[7 Marks]
b)

Explain the construction and working principle of a photo diode.

[7 Marks]
Q7

Answer the following:

a)

Explain the characteristics of an Ideal Op-Amp.

[7 Marks]
b)

Explain Op-amp as Differentiator and Integrator. Also draw the output Waveforms?

[7 Marks]
Q8

Answer the following:

a)

With a neat diagram explain the working of a PN junction diode in forward bias and reverse bias.

[7 Marks]
b)

Consider a pn junction in equilibrium at room temperature (T=300 K) for which the doping concentrations are NA=1018/cm3N_A = 10^{18} / \text{cm}^3 and ND=1016/cm3N_D = 10^{16} / \text{cm}^3 and the cross-sectional area A=104 cm2A = 10^{-4} \text{ cm}^2. Calculate pp,npo,nn,pno,Vo,W,Xn,Xpp_p, n_{po}, n_n, p_{no}, V_o, W, X_n, X_p, and QjQ_j. Use ni=1.5×1010/cm3n_i = 1.5 \times 10^{10} / \text{cm}^3.

[7 Marks]
Q9

Explain the following (attempt any two) :

a)

Voltage divider bias network

[7 Marks]
b)

Clipper and Clamper

[7 Marks]
c)

Drift and Diffusion current

[7 Marks]
[14 Marks]

2020 041401

B.Tech 4th Semester Special Exam., 2020 (Old Course)

Time 3 hours
Full Marks 70
Instructions:
  • The marks are indicated in the right-hand margin.
  • There are NINE questions in this paper.
  • Attempt FIVE questions in all.
  • Question No. 1 is compulsory.

Section A

Q1

Answer the following questions briefly (any seven) :

a)

Compute the collector current if base current is 60μA60 \mu A and current gain is 70.

[2 Marks]
b)

Define ripple as referred to in a rectifier circuit.

[2 Marks]
c)

A Zener diode has how many p-n junctions?

[2 Marks]
d)

Write the formula for total power dissipated by a transistor in terms of voltage and current associated to transistor circuit.

[2 Marks]
e)

What is the value of VBEV_{BE} for a C-E configuration, when a silicon transistor is forward biased?

[2 Marks]
f)

In a base resistor method, if the value of β\beta changes by 50, then by what factor collector current will change?

[2 Marks]
g)

In voltage divider bias, VCC=25VV_{CC} = 25 V. R1=10kΩR_1 = 10 k\Omega, R2=2.2kΩR_2 = 2.2 k\Omega, RC=3.6kΩR_C = 3.6 k\Omega and RE=1kΩR_E = 1 k\Omega. What is the emitter voltage?

[2 Marks]
h)

When drain voltage equals the pinch-off-voltage, then what will happen to drain current if drain voltage increases?

[2 Marks]
i)

At which point in JFET biasing, the JFET is not longer able to control the current?

[2 Marks]
j)

Why is an SCR made of silicon and not germanium?

[2 Marks]
[14 Marks]

Section B

Q2

Answer the following:

a)

Explain Hall effect phenomenon and list out its applications. Quantitatively discuss the use of Hall effect to determine mobility.

[7 Marks]
b)

Define static and dynamic resistances of diode. What are their uses?

[7 Marks]
Q3

Answer the following:

a)

In the circuit given below, the Zener voltage ($V_Z$) = 6 V, knee current ($I_Z$) = 6 mA and maximum power dissipated in Zener diode ($P_{max}$) = 0.4 W. Compute maximum and minimum values of RLR_L such that Vo=11VV_o = 11 V for the satisfactory operation of this circuit : [Diagram: Zener regulator with source 15V, series resistor Rs=80ΩR_s=80\Omega, Zener diode VZ=6VV_Z=6V in series with a 5V source, and output voltage Vo=11VV_o=11V across load resistor RLR_L.]

[7 Marks]
b)

Draw the circuit diagram of full-wave bridge rectifier and give its input and output waveforms. Also derive the expression for the DC current.

[7 Marks]
Q4

Answer the following:

a)

Explain the working of full-wave bridge rectifier with the help of its circuit diagram, input and output waveforms. List the advantages and disadvantages of this rectifier.

[7 Marks]
b)

Define stabilization factors S, S' and S''. Derive the expression of S for fixed bias transistor circuit.

[7 Marks]
Q5

Answer the following:

a)

A transistor amplifier connected in CE mode has β=80\beta = 80 and IB=30μAI_B = 30 \mu A. Compute the values of IC,IEI_C, I_E and α\alpha.

[7 Marks]
b)

Explain the working of RC low-pass filter and draw its frequency response. Compute the cut-off frequency if RC circuit consisting of a resistor of 8kΩ8 k\Omega in series with a capacitor of 60 nF.

[7 Marks]
Q6

Answer the following:

a)

Compute the stability factor S for emitter feedback bias circuit. How the stability of Q-point is better in emitter feedback bias compare to fixed bias circuit?

[7 Marks]
b)

Why is an FET known as a unipolar device? How do you compare this device with BJT?

[7 Marks]
Q7

Answer the following:

a)

Data sheet of an EMOSFET specifies the following parameters : ID(on)=60mAI_{D(on)} = 60 mA at VGS=7VV_{GS} = 7 V and VTV_T, the threshold voltage for EMOSFET is equal to 3 V. Determine the drain current at VGS=4VV_{GS} = 4 V.

[7 Marks]
b)

Explain thermal runaway. Show graphically that thermal runaway cannot take place if the quiescent point is located at VCE<(1/2)VCCV_{CE} < (1/2) V_{CC}.

[7 Marks]
Q8

Answer the following:

a)

An inverting op-amp has Rf=120kΩR_f = 120 k\Omega and R1=4kΩR_1 = 4 k\Omega. Find the voltage gain of the amplifier. Also find the amplifier input resistance, input current and the output voltage, if the Input voltage is 0.2 V. Assume op-amp to be ideal.

[7 Marks]
b)

Discuss a current-series feedback amplifier and compute the expression for transconductance using low-frequency approximate h-model of amplifier with an unbypassed emitter resistance.

[7 Marks]
Q9

Answer the following:

a)

Draw the V-I characteristic of silicon-controlled rectifier (SCR) and explain different parameters of the curve. Explain any two SCR triggering or turn-on methods.

[7 Marks]
b)

Explain the characteristics of an ideal op-amp. Mention two applications of op-amp. Draw the integrator circuit using op-amp.

[7 Marks]

2020 101302

B.Tech 3rd Semester Exam., 2020

Time 3 hours
Full Marks 70
Instructions:
  • The marks are indicated in the right-hand margin.
  • There are NINE questions in this paper.
  • Attempt FIVE questions in all.
  • Question No. 1 is compulsory.

Q.1 Fill in the blanks/Answer any seven of the following:

Q1.1

In CB configuration, output characteristics may be shown by plot of _______.

Q1.2

The _______ carriers enter the channel region through the _______ terminal and leave the channel through the _______ terminal in JFET.

Q1.3

Mention the advantages of Wien bridge oscillator.

Q1.4

What is reverse leakage current in CE configuration?

Q1.5

How is amplifier different from the oscillator?

Q1.6

Name the breakdown mechanism in the lightly doped P-N junction diode under reverse biased condition.

Q1.7

Draw the V-I characteristics of photodiode.

Q1.8

What is transconductance with reference to JFET?

Q1.9

What is the effect of removing bypass capacitor across the emitter resistor in case of CE amplifier?

Q1.10

What is meant by phase reversal?

Q.2 Solve both questions:

Q2.1

Find the DC voltage, ripple factor and efficiency for the half-wave rectifier given in the circuit. What should be PIV of the diode used? If bridge rectifier is used for same power supply, what will be the value of DC voltage and PIV of diode?

Question Diagram
Q2.2

Calculate the range of $I_{L}$ and $R_{L}$ so that $V_{RL}$ being maintained at 10 V and also calculate the value of maximum voltage rating in the circuit with 50V source, 1K series resistor, 10V Zener with $I_{Zmax}$ 32 mA, Variable $R_L$.

Question Diagram

Q.3 Solve both questions:

Q3.1

Draw the waveform of output $v_{0}$ and explain the operation of circuit with AC source $v_i$, Resistor R, Parallel clippers with diodes and batteries $V_{R1}$ and $V_{R2}$ where $V_{R1} < V_{R2}$.

Question Diagram
Q3.2

Discuss the application of SCR as a power control with the help of circuit diagram.

Q.4 Solve both questions:

Q4.1

For the network given, determine the following parameters using the approximate equivalent model: Voltage gain $A_{v}$, current gain $A_{i}$, input impedance $Z_{i}'$ and $Z_{i}$.

Question Diagram
Q4.2

Calculate the value of $R_{1}$ in the biasing circuit so that the Q-point is fixed at $I_{C}=8~mA$ and $V_{CE}=3V$ with $V_{CC} = -9V$, 250$\Omega$ collector resistor, 500$\Omega$ emitter resistor, $\beta=80$.

Question Diagram

Q.5 Solve both questions:

Q5.1

Given a depletion-type MOSFET. In the positive $v_{GS}$ region, does the drain current increase at a significantly higher rate than for negative value? Does the $I_{D}$ curve become more and more vertical with increasing positive values of $V_{GS}$?

Q5.2

Draw V-I characteristic curves of JFET and mark various regions. Explain how FET is voltage-controlled device.

Q.6 Solve both questions:

Q6.1

Explain the working of single-stage common emitter amplifier with the help of circuit diagram. Draw and explain the DC load-line analysis of this amplifier.

Q6.2

A single-stage amplifier has voltage gain of 10 and bandwidth of 1 MHz. Three such stages are cascaded and negative feedback of 10% is applied to the cascade stage. Find out the overall voltage gain and bandwidth of cascade stage with feedback.

Q.7 Solve both questions:

Q7.1

Explain the operation of Colpitts oscillator with the help of circuit diagram.

Q7.2

Draw the block diagram and explain the operation of sweep frequency generator.

Q.8 Solve both questions:

Q8.1

Discuss with the help of circuit diagram, the purpose of providing negative feedback and positive feedback.

Q8.2

Draw the circuit diagram of voltage-shunt feedback amplifier and derive the expression of closed-loop voltage gain using op-amp.

Q.9 Solve both questions:

Q9.1

Explain the operation performed by the circuit with AC $v_{in}$, Resistor $R_1$, Capacitor $C_F$ in feedback, Load $R_L$ and derive the expression of output voltage $v_{0}$.

Question Diagram
Q9.2

Op-amp can be used to add the DC voltage (addition operation). Draw the circuit and explain the operation of adder using op-amp in non-inverting mode.


2020 V2 101302

B.Tech 3rd Semester Exam., 2020 (New Course)

Time 03 Hours
Full Marks 70
Instructions:
  • The marks are indicated in the right-hand margin.
  • There are NINE questions in this paper.
  • Attempt FIVE questions in all.
  • Question No. 1 is compulsory.

Q.1 Fill in the blanks/Answer any seven of the following:

Q1.1

In CB configuration, output characteristics may be shown by plot of ______

Q1.2

The carriers enter the channel region through the ______ terminal and leave the channel through the ______ terminal in JFET.

Q1.3

Mention the advantages of Wien bridge oscillator.

Q1.4

What is reverse leakage current in CE configuration?

Q1.5

How is amplifier different from the oscillator?

Q1.6

Name the breakdown mechanism in the lightly doped P-N junction diode under reverse biased condition.

Q1.7

Draw the V-I characteristics of photodiode.

Q1.8

What is transconductance with reference to JFET?

Q1.9

What is the effect of removing bypass capacitor across the emitter resistor in case of CE amplifier?

Q1.10

What is meant by phase reversal?

Q.2 Solve both questions :

Q2.1

Find the DC voltage, ripple factor and efficiency for the half-wave rectifier given in the circuit below: What should be PIV of the diode used? If bridge rectifier is used for same power supply, what will be the value of DC voltage and PIV of diode?

Q2.2

Calculate the range of ILI_L and RLR_L so that VRLV_{RL} being maintained at 10 V and also calculate the value of maximum voltage rating in the circuit given below :

Q.3 Solve both questions :

Q3.1

Draw the waveform of output v0v_0 and explain the operation of circuit given below: (Refer to question paper for circuit diagram)

Q3.2

Discuss the application of SCR as a power control with the help of circuit diagram.

Q.4 Solve both questions :

Q4.1

For the network given below, determine the following parameters using the approximate equivalent model. Voltage gain AvA_v, current gain AiA_i, input impedance ZiZ_i' and $ Z_i $:

Q4.2

Calculate the value of R1R_1 in the biasing circuit in the figure given below so that the Q-point is fixed at IC=8 mAI_C = 8 \text{ mA} and VCE=3VV_{CE} = 3\text{V}:

Q.5 Solve both questions :

Q5.1

Given a deletion-type MOSFET. In the positive vGSv_{GS} region, does the drain current increase at a significantly higher rate than for negative value? Does the IDI_D curve become more and more vertical with increasing positive values of vGSv_{GS}?

Q5.2

Draw V-I characteristic curves of JFET and mark various regions. Explain how FET is voltage-controlled device.

Q.6 Solve both questions :

Q6.1

Explain the working of single-stage common emitter amplifier with the help of circuit diagram. Draw and explain the DC load-line analysis of this amplifier.

Q6.2

A single-stage amplifier has voltage gain of 10 and bandwidth of 1 MHz. Three such stages are cascaded and negative feedback of 10% is applied to the cascade stage. Find out the overall voltage gain and bandwidth of cascade stage with feedback.

Q.7 Solve both questions :

Q7.1

Explain the operation of Colpitts oscillator with the help of circuit diagram.

Q7.2

Draw the block diagram and explain the operation of sweep frequency generator.

Q.8 Solve both questions :

Q8.1

Discuss with the help of circuit diagram, the purpose of providing negative feedback and positive feedback.

Q8.2

Draw the circuit diagram of voltage-shunt feedback amplifier and derive the expression of closed-loop voltage gain using op-amp.

Q.9 Solve both questions :

Q9.1

Explain the operation performed by the circuit given below and derive the expression of output voltage v0v_0:

Q9.2

Op-amp can be used to add the DC voltage (addition operation). Draw the circuit and explain the operation of adder using op-amp in non-inverting mode.


2020 V3 101302

B.Tech 3rd Semester Exam., 2020 (New Course)

Time 03 Hours
Full Marks 70
Instructions:
  • The marks are indicated in the right-hand margin.
  • There are NINE questions in this paper.
  • Attempt FIVE questions in all.
  • Question No. 1 is compulsory.

Q.1 Fill in the blanks/Answer any seven of the following:

Q1.1

In CB configuration, output characteristics may be shown by plot of ______

Q1.2

The carriers enter the channel region through the ______ terminal and leave the channel through the ______ terminal in JFET.

Q1.3

Mention the advantages of Wien bridge oscillator.

Q1.4

What is reverse leakage current in CE configuration?

Q1.5

How is amplifier different from the oscillator?

Q1.6

Name the breakdown mechanism in the lightly doped P-N junction diode under reverse biased condition.

Q1.7

Draw the V-I characteristics of photodiode.

Q1.8

What is transconductance with reference to JFET?

Q1.9

What is the effect of removing bypass capacitor across the emitter resistor in case of CE amplifier?

Q1.10

What is meant by phase reversal?

Q.2 Solve both questions :

Q2.1

Find the DC voltage, ripple factor and efficiency for the half-wave rectifier given in the circuit below: What should be PIV of the diode used? If bridge rectifier is used for same power supply, what will be the value of DC voltage and PIV of diode?

Question Diagram
Q2.2

Calculate the range of $ I_L $ and $ R_L $ so that $ V_{RL} $ being maintained at 10 V and also calculate the value of maximum voltage rating in the circuit given below :

Question Diagram

Q.3 Solve both questions :

Q3.1

Draw the waveform of output $ v_0 $ and explain the operation of circuit given below: (Refer to question paper for circuit diagram)

Question Diagram
Q3.2

Discuss the application of SCR as a power control with the help of circuit diagram.

Q.4 Solve both questions :

Q4.1

For the network given below, determine the following parameters using the approximate equivalent model. Voltage gain $ A_v $, current gain $ A_i $, input impedance $ Z_i' $ and $ Z_i $:

Question Diagram
Q4.2

Calculate the value of $ R_1 $ in the biasing circuit in the figure given below so that the Q-point is fixed at $ I_C = 8 \text{ mA} $ and $ V_{CE} = 3\text{V} $:

Question Diagram

Q.5 Solve both questions :

Q5.1

Given a deletion-type MOSFET. In the positive $ v_{GS} $ region, does the drain current increase at a significantly higher rate than for negative value? Does the $ I_D $ curve become more and more vertical with increasing positive values of $ v_{GS} $?

Q5.2

Draw V-I characteristic curves of JFET and mark various regions. Explain how FET is voltage-controlled device.

Q.6 Solve both questions :

Q6.1

Explain the working of single-stage common emitter amplifier with the help of circuit diagram. Draw and explain the DC load-line analysis of this amplifier.

Q6.2

A single-stage amplifier has voltage gain of 10 and bandwidth of 1 MHz. Three such stages are cascaded and negative feedback of 10% is applied to the cascade stage. Find out the overall voltage gain and bandwidth of cascade stage with feedback.

Q.7 Solve both questions :

Q7.1

Explain the operation of Colpitts oscillator with the help of circuit diagram.

Q7.2

Draw the block diagram and explain the operation of sweep frequency generator.

Q.8 Solve both questions :

Q8.1

Discuss with the help of circuit diagram, the purpose of providing negative feedback and positive feedback.

Q8.2

Draw the circuit diagram of voltage-shunt feedback amplifier and derive the expression of closed-loop voltage gain using op-amp.

Q.9 Solve both questions :

Q9.1

Explain the operation performed by the circuit given below and derive the expression of output voltage $ v_0 $:

Question Diagram
Q9.2

Op-amp can be used to add the DC voltage (addition operation). Draw the circuit and explain the operation of adder using op-amp in non-inverting mode.


2020 V4 101302

B.Tech 3rd Semester Exam., 2020 (New Course)

Time 03 Hours
Full Marks 70
Instructions:
  • The marks are indicated in the right-hand margin.
  • There are NINE questions in this paper.
  • Attempt FIVE questions in all.
  • Question No. 1 is compulsory.

Q.1 Fill in the blanks/Answer any seven of the following:

Q1.1

In CB configuration, output characteristics may be shown by plot of ______

Q1.2

The carriers enter the channel region through the ______ terminal and leave the channel through the ______ terminal in JFET.

Q1.3

Mention the advantages of Wien bridge oscillator.

Q1.4

What is reverse leakage current in CE configuration?

Q1.5

How is amplifier different from the oscillator?

Q1.6

Name the breakdown mechanism in the lightly doped P-N junction diode under reverse biased condition.

Q1.7

Draw the V-I characteristics of photodiode.

Q1.8

What is transconductance with reference to JFET?

Q1.9

What is the effect of removing bypass capacitor across the emitter resistor in case of CE amplifier?

Q1.10

What is meant by phase reversal?

Q.2 Solve both questions :

Q2.1

Find the DC voltage, ripple factor and efficiency for the half-wave rectifier given in the circuit below: What should be PIV of the diode used? If bridge rectifier is used for same power supply, what will be the value of DC voltage and PIV of diode?

Q2.2

Calculate the range of ILI_L and RLR_L so that VRLV_{RL} being maintained at 10 V and also calculate the value of maximum voltage rating in the circuit given below :

Q.3 Solve both questions :

Q3.1

Draw the waveform of output v0v_0 and explain the operation of circuit given below: (Refer to question paper for circuit diagram)

Q3.2

Discuss the application of SCR as a power control with the help of circuit diagram.

Q.4 Solve both questions :

Q4.1

For the network given below, determine the following parameters using the approximate equivalent model. Voltage gain AvA_v, current gain AiA_i, input impedance ZiZ_i' and $ Z_i $:

Q4.2

Calculate the value of R1R_1 in the biasing circuit in the figure given below so that the Q-point is fixed at IC=8 mAI_C = 8 \text{ mA} and VCE=3VV_{CE} = 3\text{V}:

Q.5 Solve both questions :

Q5.1

Given a deletion-type MOSFET. In the positive vGSv_{GS} region, does the drain current increase at a significantly higher rate than for negative value? Does the IDI_D curve become more and more vertical with increasing positive values of vGSv_{GS}?

Q5.2

Draw V-I characteristic curves of JFET and mark various regions. Explain how FET is voltage-controlled device.

Q.6 Solve both questions :

Q6.1

Explain the working of single-stage common emitter amplifier with the help of circuit diagram. Draw and explain the DC load-line analysis of this amplifier.

Q6.2

A single-stage amplifier has voltage gain of 10 and bandwidth of 1 MHz. Three such stages are cascaded and negative feedback of 10% is applied to the cascade stage. Find out the overall voltage gain and bandwidth of cascade stage with feedback.

Q.7 Solve both questions :

Q7.1

Explain the operation of Colpitts oscillator with the help of circuit diagram.

Q7.2

Draw the block diagram and explain the operation of sweep frequency generator.

Q.8 Solve both questions :

Q8.1

Discuss with the help of circuit diagram, the purpose of providing negative feedback and positive feedback.

Q8.2

Draw the circuit diagram of voltage-shunt feedback amplifier and derive the expression of closed-loop voltage gain using op-amp.

Q.9 Solve both questions :

Q9.1

Explain the operation performed by the circuit given below and derive the expression of output voltage v0v_0:

Q9.2

Op-amp can be used to add the DC voltage (addition operation). Draw the circuit and explain the operation of adder using op-amp in non-inverting mode.


2020 V6 101302

B.Tech 3rd Semester Exam., 2020 (New Course)

Time 03 Hours
Full Marks 70
Instructions:
  • The marks are indicated in the right-hand margin.
  • There are NINE questions in this paper.
  • Attempt FIVE questions in all.
  • Question No. 1 is compulsory.

Q.1 Fill in the blanks/Answer any seven of the following:

Q1.1

In CB configuration, output characteristics may be shown by plot of ______

Q1.2

The carriers enter the channel region through the ______ terminal and leave the channel through the ______ terminal in JFET.

Q1.3

Mention the advantages of Wien bridge oscillator.

Q1.4

What is reverse leakage current in CE configuration?

Q1.5

How is amplifier different from the oscillator?

Q1.6

Name the breakdown mechanism in the lightly doped P-N junction diode under reverse biased condition.

Q1.7

Draw the V-I characteristics of photodiode.

Q1.8

What is transconductance with reference to JFET?

Q1.9

What is the effect of removing bypass capacitor across the emitter resistor in case of CE amplifier?

Q1.10

What is meant by phase reversal?

Q.2 Solve both questions :

Q2.1

Find the DC voltage, ripple factor and efficiency for the half-wave rectifier given in the circuit below: What should be PIV of the diode used? If bridge rectifier is used for same power supply, what will be the value of DC voltage and PIV of diode?

Q2.2

Calculate the range of ILI_L and RLR_L so that VRLV_{RL} being maintained at 10 V and also calculate the value of maximum voltage rating in the circuit given below :

Q.3 Solve both questions :

Q3.1

Draw the waveform of output v0v_0 and explain the operation of circuit given below: (Refer to question paper for circuit diagram)

Q3.2

Discuss the application of SCR as a power control with the help of circuit diagram.

Q.4 Solve both questions :

Q4.1

For the network given below, determine the following parameters using the approximate equivalent model. Voltage gain AvA_v, current gain AiA_i, input impedance ZiZ_i' and $ Z_i $:

Q4.2

Calculate the value of R1R_1 in the biasing circuit in the figure given below so that the Q-point is fixed at IC=8 mAI_C = 8 \text{ mA} and VCE=3VV_{CE} = 3\text{V}:

Q.5 Solve both questions :

Q5.1

Given a deletion-type MOSFET. In the positive vGSv_{GS} region, does the drain current increase at a significantly higher rate than for negative value? Does the IDI_D curve become more and more vertical with increasing positive values of vGSv_{GS}?

Q5.2

Draw V-I characteristic curves of JFET and mark various regions. Explain how FET is voltage-controlled device.

Q.6 Solve both questions :

Q6.1

Explain the working of single-stage common emitter amplifier with the help of circuit diagram. Draw and explain the DC load-line analysis of this amplifier.

Q6.2

A single-stage amplifier has voltage gain of 10 and bandwidth of 1 MHz. Three such stages are cascaded and negative feedback of 10% is applied to the cascade stage. Find out the overall voltage gain and bandwidth of cascade stage with feedback.

Q.7 Solve both questions :

Q7.1

Explain the operation of Colpitts oscillator with the help of circuit diagram.

Q7.2

Draw the block diagram and explain the operation of sweep frequency generator.

Q.8 Solve both questions :

Q8.1

Discuss with the help of circuit diagram, the purpose of providing negative feedback and positive feedback.

Q8.2

Draw the circuit diagram of voltage-shunt feedback amplifier and derive the expression of closed-loop voltage gain using op-amp.

Q.9 Solve both questions :

Q9.1

Explain the operation performed by the circuit given below and derive the expression of output voltage v0v_0:

Q9.2

Op-amp can be used to add the DC voltage (addition operation). Draw the circuit and explain the operation of adder using op-amp in non-inverting mode.


2020 V7 101302

B.Tech 3rd Semester Exam., 2020

Time 3 hours
Full Marks 70
Instructions:
  • The marks are indicated in the right-hand margin.
  • There are NINE questions in this paper.
  • Attempt FIVE questions in all.
  • Question No. 1 is compulsory.

Q.1 Fill in the blanks/Answer any seven of the following:

Q1.1

In CB configuration, output characteristics may be shown by plot of _______.

Q1.2

The _______ carriers enter the channel region through the _______ terminal and leave the channel through the _______ terminal in JFET.

Q1.3

Mention the advantages of Wien bridge oscillator.

Q1.4

What is reverse leakage current in CE configuration?

Q1.5

How is amplifier different from the oscillator?

Q1.6

Name the breakdown mechanism in the lightly doped P-N junction diode under reverse biased condition.

Q1.7

Draw the V-I characteristics of photodiode.

Q1.8

What is transconductance with reference to JFET?

Q1.9

What is the effect of removing bypass capacitor across the emitter resistor in case of CE amplifier?

Q1.10

What is meant by phase reversal?

Q.2 Solve both questions:

Q2.1

Find the DC voltage, ripple factor and efficiency for the half-wave rectifier given in the circuit. What should be PIV of the diode used? If bridge rectifier is used for same power supply, what will be the value of DC voltage and PIV of diode?

Question Diagram
Q2.2

Calculate the range of $I_{L}$ and $R_{L}$ so that $V_{RL}$ being maintained at 10 V and also calculate the value of maximum voltage rating in the circuit with 50V source, 1K series resistor, 10V Zener with $I_{Zmax}$ 32 mA, Variable $R_L$.

Question Diagram

Q.3 Solve both questions:

Q3.1

Draw the waveform of output $v_{0}$ and explain the operation of circuit with AC source $v_i$, Resistor R, Parallel clippers with diodes and batteries $V_{R1}$ and $V_{R2}$ where $V_{R1} < V_{R2}$.

Question Diagram
Q3.2

Discuss the application of SCR as a power control with the help of circuit diagram.

Q.4 Solve both questions:

Q4.1

For the network given, determine the following parameters using the approximate equivalent model: Voltage gain $A_{v}$, current gain $A_{i}$, input impedance $Z_{i}'$ and $Z_{i}$.

Question Diagram
Q4.2

Calculate the value of $R_{1}$ in the biasing circuit so that the Q-point is fixed at $I_{C}=8~mA$ and $V_{CE}=3V$ with $V_{CC} = -9V$, 250$\Omega$ collector resistor, 500$\Omega$ emitter resistor, $\beta=80$.

Question Diagram

Q.5 Solve both questions:

Q5.1

Given a depletion-type MOSFET. In the positive $v_{GS}$ region, does the drain current increase at a significantly higher rate than for negative value? Does the $I_{D}$ curve become more and more vertical with increasing positive values of $V_{GS}$?

Q5.2

Draw V-I characteristic curves of JFET and mark various regions. Explain how FET is voltage-controlled device.

Q.6 Solve both questions:

Q6.1

Explain the working of single-stage common emitter amplifier with the help of circuit diagram. Draw and explain the DC load-line analysis of this amplifier.

Q6.2

A single-stage amplifier has voltage gain of 10 and bandwidth of 1 MHz. Three such stages are cascaded and negative feedback of 10% is applied to the cascade stage. Find out the overall voltage gain and bandwidth of cascade stage with feedback.

Q.7 Solve both questions:

Q7.1

Explain the operation of Colpitts oscillator with the help of circuit diagram.

Q7.2

Draw the block diagram and explain the operation of sweep frequency generator.

Q.8 Solve both questions:

Q8.1

Discuss with the help of circuit diagram, the purpose of providing negative feedback and positive feedback.

Q8.2

Draw the circuit diagram of voltage-shunt feedback amplifier and derive the expression of closed-loop voltage gain using op-amp.

Q.9 Solve both questions:

Q9.1

Explain the operation performed by the circuit with AC $v_{in}$, Resistor $R_1$, Capacitor $C_F$ in feedback, Load $R_L$ and derive the expression of output voltage $v_{0}$.

Question Diagram
Q9.2

Op-amp can be used to add the DC voltage (addition operation). Draw the circuit and explain the operation of adder using op-amp in non-inverting mode.


2020 V8 101302

B.Tech 3rd Semester Exam., 2020 (New Course)

Time 03 Hours
Full Marks 70
Instructions:
  • The marks are indicated in the right-hand margin.
  • There are NINE questions in this paper.
  • Attempt FIVE questions in all.
  • Question No. 1 is compulsory.

Q.1 Fill in the blanks/Answer any seven of the following:

Q1.1

In CB configuration, output characteristics may be shown by plot of ______

Q1.2

The carriers enter the channel region through the ______ terminal and leave the channel through the ______ terminal in JFET.

Q1.3

Mention the advantages of Wien bridge oscillator.

Q1.4

What is reverse leakage current in CE configuration?

Q1.5

How is amplifier different from the oscillator?

Q1.6

Name the breakdown mechanism in the lightly doped P-N junction diode under reverse biased condition.

Q1.7

Draw the V-I characteristics of photodiode.

Q1.8

What is transconductance with reference to JFET?

Q1.9

What is the effect of removing bypass capacitor across the emitter resistor in case of CE amplifier?

Q1.10

What is meant by phase reversal?

Q.2 Solve both questions :

Q2.1

Find the DC voltage, ripple factor and efficiency for the half-wave rectifier given in the circuit below: What should be PIV of the diode used? If bridge rectifier is used for same power supply, what will be the value of DC voltage and PIV of diode?

Question Diagram
Q2.2

Calculate the range of $ I_L $ and $ R_L $ so that $ V_{RL} $ being maintained at 10 V and also calculate the value of maximum voltage rating in the circuit given below :

Question Diagram

Q.3 Solve both questions :

Q3.1

Draw the waveform of output $ v_0 $ and explain the operation of circuit given below: (Refer to question paper for circuit diagram)

Question Diagram
Q3.2

Discuss the application of SCR as a power control with the help of circuit diagram.

Q.4 Solve both questions :

Q4.1

For the network given below, determine the following parameters using the approximate equivalent model. Voltage gain $ A_v $, current gain $ A_i $, input impedance $ Z_i' $ and $ Z_i $:

Question Diagram
Q4.2

Calculate the value of $ R_1 $ in the biasing circuit in the figure given below so that the Q-point is fixed at $ I_C = 8 \text{ mA} $ and $ V_{CE} = 3\text{V} $:

Question Diagram

Q.5 Solve both questions :

Q5.1

Given a deletion-type MOSFET. In the positive $ v_{GS} $ region, does the drain current increase at a significantly higher rate than for negative value? Does the $ I_D $ curve become more and more vertical with increasing positive values of $ v_{GS} $?

Q5.2

Draw V-I characteristic curves of JFET and mark various regions. Explain how FET is voltage-controlled device.

Q.6 Solve both questions :

Q6.1

Explain the working of single-stage common emitter amplifier with the help of circuit diagram. Draw and explain the DC load-line analysis of this amplifier.

Q6.2

A single-stage amplifier has voltage gain of 10 and bandwidth of 1 MHz. Three such stages are cascaded and negative feedback of 10% is applied to the cascade stage. Find out the overall voltage gain and bandwidth of cascade stage with feedback.

Q.7 Solve both questions :

Q7.1

Explain the operation of Colpitts oscillator with the help of circuit diagram.

Q7.2

Draw the block diagram and explain the operation of sweep frequency generator.

Q.8 Solve both questions :

Q8.1

Discuss with the help of circuit diagram, the purpose of providing negative feedback and positive feedback.

Q8.2

Draw the circuit diagram of voltage-shunt feedback amplifier and derive the expression of closed-loop voltage gain using op-amp.

Q.9 Solve both questions :

Q9.1

Explain the operation performed by the circuit given below and derive the expression of output voltage $ v_0 $:

Question Diagram
Q9.2

Op-amp can be used to add the DC voltage (addition operation). Draw the circuit and explain the operation of adder using op-amp in non-inverting mode.


2020 104301

B.Tech 3rd Semester Exam., 2020 (New Course)

Time 3 hours
Full Marks 70
Instructions:
  • The marks are indicated in the right-hand margin.
  • There are NINE questions in this paper.
  • Attempt FIVE questions in all.
  • Question No. 1 is compulsory.

Section A

Q1

Choose the correct option of the following (any seven) :

a)

Which of the following expressions represents the correct formula for the density of electrons occupying the donor level?

a)

nd=NdNd+n_d = N_d - N_d^+

b)

nd=NdNdn_d = N_d - N_d^-

c)

nd=Nd+Nd+n_d = N_d + N_d^+

d)

nd=Nd+Ndn_d = N_d + N_d^-

[2 Marks]
b)

What is the ripple factor of a half-wave rectifier?

a)

0.31

b)

0.48

c)

0.707

d)

1.21

[2 Marks]
c)

Which of the following is true about the resistance of a Zener diode?

a)

It has an incremental resistance

b)

It has dynamic resistance

c)

The value of the resistance is the inverse of the slope of the i-v characteristics of the Zener diode

d)

All of the above

[2 Marks]
d)

Which of the following is true in construction of a transistor?

a)

The collector dissipates lesser power

b)

The emitter supplies minority carriers

c)

The collector is made physically larger than the emitter region

d)

The collector collects minority charge carriers

[2 Marks]
e)

Consider the following statements : A clamper circuit

  1. adds or subtracts a d.c. voltage to a waveform
  2. does not change the waveform
  3. amplifies the waveform Which are correct?
a)

1, 2

b)

1, 3

c)

1, 2, 3

d)

2, 3

e)

None of the above

[2 Marks]
f)

For what kind of amplifications can the active region of the common-emitter configuration be used?

a)

Voltage

b)

Current

c)

Power

d)

All of the above

[2 Marks]
g)

How does the FET operate before the pinch-off region with small value of drain-to-source voltage in accordance to the control of drain-to-source resistance by the bias voltage?

a)

As a voltage controlled resistor

b)

As a voltage dependent resistor

c)

As a voltage variable resistor

d)

All of the above

[2 Marks]
h)

A junction FET can operate in

a)

depletion mode only

b)

enhancement mode only

c)

depletion and enhancement modes

d)

neither depletion nor enhancement mode

[2 Marks]
i)

Which of the following is not a property of an ideal operational amplifier?

a)

Zero input impedance

b)

Infinite bandwidth

c)

Infinite open-loop gain

d)

Zero common-mode gain or conversely infinite common mode-rejection

[2 Marks]
j)

Which among the following is the major responsible reason for the cause of 'slew rate'?

a)

Current limiting

b)

Saturation of internal stages due to application of high frequency and amplitude signal

c)

Both (i) and (ii)

d)

None of the above

[2 Marks]
[14 Marks]

Section B

Q2

Answer the following:

a)

Draw potential energy diagrams for a forward as well as a reverse-biased p-n junction and explain the flow of currents in both the cases.

[7 Marks]
b)

The p-silicon has resistivity of 100Ω cm100 \Omega \text{ cm}. The other parameters for silicon are : Intrinsic carrier density, ni=1010 cm3n_i = 10^{10} \text{ cm}^{-3}, Hole mobility, μp=500 cm2/v.s\mu_p = 500 \text{ cm}^2 / \text{v.s} and Electron mobility, μn=1200 cm2/v.s\mu_n = 1200 \text{ cm}^2 / \text{v.s}. Calculate the number of electrons for every 5000 million holes in the semiconductor.

[7 Marks]
Q3

Answer the following:

a)

Determine vov_o and the required PIV rating of each diode for the configuration of the following figure : [Diagram: Bridge rectifier circuit with input sine wave (peak 100V), ideal diodes, and load resistor $R_L = 2.2 k\Omega$]. In addition, determine the maximum current through each diode.

[7 Marks]
b)

The circuit shown below uses a 9V Zener diode. If the load resistance RLR_L is equal to 1.5kΩ1.5 k\Omega and the d.c. source equals 24V, find the maximum value of resistor R required to maintain a constant voltage of 9V across the load. [Diagram: Zener diode circuit with source Vs=24VV_s=24V, series resistor R, and parallel combination of Zener VZ=9VV_Z=9V and load RL=1.5kΩR_L=1.5k\Omega.]

[7 Marks]
Q4

Answer the following:

a)

Draw the cross-sectional view of an n-p-n transistor and explain its operation in active region of operation. What are the different current components of the transistor? How can one use a transistor as amplifier?

[7 Marks]
b)

Define αdc\alpha_{dc} and βdc\beta_{dc}. Derive the relationship between αdc\alpha_{dc} and βdc\beta_{dc}. If the base current in a transistor is 30μA30 \mu A, when the emitter current is 7.2mA7.2 mA, what are the values of αdc\alpha_{dc} and βdc\beta_{dc}? Also, calculate the collector current.

[7 Marks]
Q5

Answer the following:

a)

Draw and explain the input and output characteristics of CB configuration. Where can we use the CB configuration in a transistor circuit? Explain with proper justification.

[7 Marks]
b)

Design a collector to base bias circuit shown in the figure below for the specified conditions : VCC=15V,VCE=5V,IC=5mA,β=150V_{CC} = 15V, V_{CE} = 5V, I_C = 5mA, \beta = 150. [Diagram: Collector-to-base bias circuit configuration.]

[7 Marks]
Q6

Answer the following:

a)

Draw the structure of JFET and discuss its working. What is pinch-off voltage? How to get its value experimentally?

[7 Marks]
b)

For the voltage-divider configuration of the figure shown below, determine : (i) IDQI_{DQ} and VGSQV_{GSQ}, (ii) VDV_D and VSV_S. [Diagram: JFET voltage divider bias circuit. VDD=24V,R1=10MΩ,R2=6.8MΩ,RD=2.2kΩ,RS=0.75kΩV_{DD}=24V, R_1=10 M\Omega, R_2=6.8 M\Omega, R_D=2.2 k\Omega, R_S=0.75 k\Omega. JFET parameters: VGS(Th)=3V,ID(on)=5mA,VGS(on)=6VV_{GS(Th)}=-3V, I_{D(on)}=5mA, V_{GS(on)}=-6V.]

[7 Marks]
Q7

Answer the following:

a)

Define an ideal operational amplifier. Draw the approximate block diagram of an OPAMP giving various stages of the amplifier.

[7 Marks]
b)

Find the output voltage of the following OPAMP circuit : [Diagram: Inverting OPAMP circuit with non-inverting terminal grounded through 2k, inverting terminal connected to 12V via 2k, and feedback resistor 10k.]

[7 Marks]
Q8

Answer the following:

a)

Draw the gain-frequency response of an RC coupled amplifier. Discuss fall in gain at very low and at very high frequencies.

[7 Marks]
b)

Common emitter (CE) amplifier shown in the figure has voltage gain of 150 when RE=0R_E=0. Stability is brought through negative feedback by adding resistor RER_E. Calculate the value of resistor RER_E using feedback concepts so that final voltage gain ($= A_{FB}$) is equal to 100. [Diagram: CE amplifier circuit with voltage divider bias R1=100k,R2=100k,RC=5k,VCC=+15VR_1=100k, R_2=100k, R_C=5k, V_{CC}=+15V and unbypassed emitter resistor RER_E.]

[7 Marks]
Q9

Answer the following:

a)

Explain the construction and working principle of a photo diode (PD).

[7 Marks]
b)

Explain the construction and working principle of an SCR. Write the applications utilizing SCR.

[7 Marks]

2020 ESC-202 (101302)

B.Tech 3rd Semester Special Exam., 2020

Time 03 Hours
Full Marks 70
Instructions:
  • The marks are indicated in the right-hand margin.
  • There are NINE questions in this paper.
  • Attempt FIVE questions in all.
  • Question No. 1 is compulsory.

Q.1 Answer/Fill in the blanks/Write true or false (any seven):

Q1.1

Why is filter required to be added after rectifier circuit?

Q1.2

What is the application of voltage regulator?

Q1.3

DC value of pure AC waveform is ______.

Q1.4

Which of the transistor currents is always the largest?

Q1.5

What is the source of leakage current in a transistor?

Q1.6

What is the major difference between a bipolar and a unipolar device?

Q1.7

Give the advantage of negative feedback in amplifier.

Q1.8

BUT amplifier changes the frequency and shape of the signal.

Q1.9

CMMR for ideal operational amplifier is ______.

Q1.10

Slew rate for ideal operational amplifier is ______.

Q.2 Solve both questions :

Q2.1

Draw volt-ampere characteristics of a Zener diode. What is meant by the knee voltage in the curve?

Q2.2

Describe in detail the avalanche breakdown mechanism in a diode.

Q.3 Solve both questions :

Q3.1

Explain the principle of operation of LED with the help of diagram.

Q3.2

Derive the expression for $ I_C $ in terms of $ I_E $ and $ \alpha_{dc} $ for a common-base BUT configuration. For a given $ \alpha_{dc} $ of 0.998, determine $ I_C $, if $ I_E = 4 \, \text{mA} $.

Q.4 Solve both questions :

Q4.1

Define the stability factor. What does smaller stability factor indicate?

Q4.2

Derive the expression for stability factor for voltage divider bias (self-bias) circuit.

Q.5 Solve both questions :

Q5.1

Explain the construction and characteristics of FET.

Q5.2

Draw and explain h-parameter small signal model for BJT.

Q.6 Solve both questions :

Q6.1

Explain the working of common emitter amplifier with the help of circuit diagram.

Q6.2

What are the roles of coupling and bypass capacitors? Explain in detail.

Q.7 Solve both questions :

Q7.1

Describe the RC phase-shift oscillator with circuit diagram.

Q7.2

Explain the working of high-frequency LC oscillator with the help of circuit diagram.

Q.8 Solve both questions :

Q8.1

Explain the working of voltage series feedback amplifier with the help of block diagram.

Q8.2

Design an integrator using op-amp and explain its working.

Q.9 Solve both questions :

Q9.1

Write the circuit diagram of differential amplifier configurations and explain its working.

Q9.2

Explain about CMRR, slew rate and concept of virtual ground.


2020 SPECIAL ESC-202 (101302)

B.Tech 3rd Semester Special Exam., 2020 (New Course)

Time 03 Hours
Full Marks 70
Instructions:
  • The marks are indicated in the right-hand margin.
  • There are NINE questions in this paper.
  • Attempt FIVE questions in all.
  • Question No. 1 is compulsory.

Q.1 Answer/Fill in the blanks/Write true or false (any seven):

Q1.1

Why is filter required to be added after rectifier circuit?

Q1.2

What is the application of voltage regulator?

Q1.3

DC value of pure AC waveform is ______

Q1.4

Which of the transistor currents is always the largest?

Q1.5

What is the source of leakage current in a transistor?

Q1.6

What is the major difference between a bipolar and a unipolar device?

Q1.7

Give the advantage of negative feedback in amplifier

Q1.8

BJT amplifier changes the frequency and shape of the signal. (True/False)

Q1.9

CMMR for ideal operational amplifier is ______

Q1.10

Slew rate for ideal operational amplifier is ______

Q.2 Solve both questions :

Q2.1

Draw volt-ampere characteristics of a Zener diode. What is meant by the knee voltage in the curve?

Q2.2

Describe in detail the avalanche breakdown mechanism in a diode.

Q.3 Solve both questions :

Q3.1

Explain the principle of operation of LED with the help of diagram.

Q3.2

Derive the expression for $ I_C $ in terms of $ I_E $ and $ \alpha_d $ for a common-base BJT configuration. For a given $ \alpha_d $ of 0.998, determine $ I_C $ if $ I_E = 4 \text{ mA} $.

Q.4 Solve both questions :

Q4.1

Define the stability factor. What does smaller stability factor indicate?

Q4.2

Derive the expression for stability factor for voltage divider bias (self-bias) circuit.

Q.5 Solve both questions :

Q5.1

Explain the construction and characteristics of FET.

Q5.2

Draw and explain h-parameter small signal model for BJT.

Q.6 Solve both questions :

Q6.1

Explain the working of common emitter amplifier with the help of circuit diagram.

Q6.2

What are the roles of coupling and bypass capacitors? Explain in detail.

Q.7 Solve both questions :

Q7.1

Describe the RC phase-shift oscillator with circuit diagram.

Q7.2

Explain the working of high-frequency LC oscillator with the help of circuit diagram.

Q.8 Solve both questions :

Q8.1

Explain the working of voltage series feedback amplifier with the help of block diagram.

Q8.2

Design an integrator using op-amp and explain its working.

Q.9 Solve both questions :

Q9.1

Write the circuit diagram of differential amplifier configurations and explain its working.

Q9.2

Explain about CMRR, slew rate and concept of virtual ground.


2019 041401

B.Tech 4th Semester Exam., 2019

Time 3 hours
Full Marks 70
Instructions:
  • The marks are indicated in the right-hand margin.
  • There are NINE questions in this paper.
  • Attempt FIVE questions in all.
  • Question No. 1 is compulsory.

Section A

Q1

Answer the following questions briefly (any seven) :

a)

If doping level in a crystal diode is increased, what will happen to the width of depletion layer?

b)

How does Zener diode behave in the breakdown region?

c)

At which voltage avalanche occurs in a diode?

d)

If the maximum DC current rating of diodes in bridge rectifier is 2A, then what is the maximum DC load current?

e)

A half-wave rectifier has an input voltage of 240 V r.m.s. If the step-down transformer has a turns ratio of 8 : 1, what is the peak load voltage? Ignore diode drop.

f)

If VCC=+20 VV_{CC} = +20 \text{ V}, voltage-divider resistor R1R_1 is 5 k\Omega5 \text{ k\Omega} and R2R_2 is 2 k\Omega2 \text{ k\Omega}, what is the base bias voltage?

g)

When does thermal runaway occur?

h)

With the E-MOSFET, what is the value of drain current when gate input voltage is zero?

i)

What is the bandwidth of an ideal operational amplifier?

j)

If gate current is increased, then what will happen to anode-cathode voltage at which SCR closes?

[14 Marks]

Section B

Q2

Answer the following:

a)

Differentiate between ideal and practical voltage sources. Give their graphical representations and convert 20 V20 \text{ V} voltage source with its series resistance of 10 \Omega10 \text{ \Omega} into its equivalent current source.

[7 Marks]
b)

Derive continuity equation for carrier concentration in body of a semiconductor.

[7 Marks]
Q3

Answer the following:

a)

Derive the expressions for (i) IrmsI_{rms}, (ii) IdcI_{dc}, (iii) ripple factor and (iv) efficiency of rectification; in case of full-wave rectifier.

[6 Marks]
b)

Draw a sketch to show various currents in an N-P-N transistor and derive the relationship between various components.

[8 Marks]
Q4

Answer the following:

a)

A 4 : 1 transformer supplies a bridge rectifier that is driving a load of 400 ohms. If the transformer input is 230 V/50 Hz230 \text{ V}/50 \text{ Hz} supply, calculate the d.c. output voltage, P-I-V and the output frequency. Assume the rectifier diodes to be ideal.

[7 Marks]
b)

Draw diode I-V characteristics, discuss its temperature dependence and obtain the expression for diode dynamic resistance.

[7 Marks]
Q5

Answer the following:

a)

Using a common collector N-P-N transistor configuration, derive the expressions for voltage gain and current gain.

[7 Marks]
b)

Design the voltage divider bias circuit to operate from 20 V20 \text{ V} supply. The bias conditions are VCE=5 V,VE=7 VV_{CE} = 5 \text{ V}, V_E = 7 \text{ V} and IC=5 mAI_C = 5 \text{ mA}.

[7 Marks]
Q6

Answer the following:

a)

A collector to base circuit has VCB=30 V,RB=200 k\Omega,RC=4 k\OmegaV_{CB} = 30 \text{ V}, R_B = 200 \text{ k\Omega}, R_C = 4 \text{ k\Omega} and VCE=20 VV_{CE} = 20 \text{ V}. Calculate hFEh_{FE} and determine VCEV_{CE} when a new transistor is replaced having hFE=150h_{FE} = 150.

[7 Marks]
b)

Draw two-dimensional structure of n-channel MOSFET. Explain its working.

[7 Marks]
Q7

Answer the following:

a)

An n-channel FET is utilized by amplifier shown in figure for which Vp=3.0 VV_p = -3.0 \text{ V} and IDSS=2 mAI_{DSS} = 2 \text{ mA}. It is desired to bias the circuit at ID=1 mAI_D = 1 \text{ mA}, using VDD=26 VV_{DD} = 26 \text{ V}. Assume rdRdr_d \gg R_d. Find (i) VGSV_{GS}, (ii) gmg_m and (iii) RSR_S.

[Diagram: Self-bias JFET amplifier circuit with RG,RD,RSR_G, R_D, R_S and bypass capacitor CSC_S, coupling capacitor CcC_c.]

[7 Marks]
b)

Explain the working of BJT voltage divider bias circuit. Derive the expression for Q-point ($I_{CQ}, V_{CEQ}$) in terms of circuit parameters.

[7 Marks]
Q8

Answer the following:

a)

Explain a voltage-series feedback amplifier with suitable example.

[7 Marks]
b)

Using an op-amp, explain the circuits for a voltage gain amplifier (with least components) and current to voltage converter.

[7 Marks]
Q9

Answer the following:

a)

Explain the working principle of unijunction transistor (UJT).

[7 Marks]
b)

Describe the structure, symbol and operation of SCR with the help of suitable diagrams.

[7 Marks]

2019 101302

B.Tech 3rd Semester Exam., 2019 (New Course)

Time 3 hours
Full Marks 70
Instructions:
  • The marks are indicated in the right-hand margin.
  • There are NINE questions in this paper.
  • Attempt FIVE questions in all.
  • Question No. 1 is compulsory.

Section A

Q1

Answer any seven of the following questions :

a)

Clipper and clamper are the applications of ________.

b)

Give one application of Zener diode.

c)

SCR is bistable device. (State True or False)

d)

Which of the transistor currents is always the largest?

e)

Sketch the common-base BJT transistor configuration (for n-p-n and p-n-p).

f)

Why is coupling capacitor used in common-emitter amplifier?

g)

Which BJT amplifier configuration has unity voltage gain?

h)

Which BJT amplifier configuration has unity current gain?

i)

Define conversion efficiency.

j)

What is the highest efficiency of class A direct coupled amplifier?

[14 Marks]

Section B

Q2

Answer the following:

a)

For the series connected diode configuration as given below in the figure, determine VD,VRV_D, V_R and IDI_D :

[Diagram: Series circuit with 8V source, Si diode (marked +V_D-$), and resistor $R (marked $+V_R-$).]

[7 Marks]
b)

Draw the diagram and explain the working of a full-wave rectifier with filter.

[7 Marks]
Q3

Answer the following:

a)

Explain the working and applications of photodiode.

[7 Marks]
b)

Explain the construction, operation and characteristics of SCR.

[7 Marks]
Q4

Answer the following:

a)

Explain the working of common-collector amplifier as a voltage buffer.

[7 Marks]
b)

Compute and explain common-emitter amplifier operating point and load line.

[7 Marks]
Q5

Answer the following:

a)

Compare between depletion type MOSFET and enhancement type MOSFET.

[7 Marks]
b)

Explain the working of common-base amplifier as a current buffer.

[7 Marks]
Q6

Answer the following:

a)

Explain about the distortions present in amplifier. List the advantages of negative feedback.

[6 Marks]
b)

Explain the working of current series feedback amplifier with the help of block diagram.

[8 Marks]
Q7

Answer the following:

a)

Describe the working of Wien bridge oscillator circuit.

[8 Marks]
b)

Design the R-C elements of a Wien bridge oscillator, when it operates at f0=10 kHzf_0 = 10 \text{ kHz}.

[6 Marks]
Q8

Answer the following:

a)

Explain the working of a non-sinusoidal type of oscillator with the help of its circuit diagram.

[7 Marks]
b)

Write and explain two applications of differential amplifier with the help of circuit diagrams.

[7 Marks]
Q9

Answer the following:

a)

Write the properties of ideal operational amplifier.

[7 Marks]
b)

Draw the pin configuration of 741 op-amp IC and explain its working.

[7 Marks]

2018 041401

B.Tech 4th Semester Examination, 2018

Time 3 hours
Full Marks 70
Instructions:
  • The marks are indicated in the right-hand margin.
  • There are NINE questions in this paper.
  • Attempt FIVE questions in all.
  • Question No. 1 is compulsory.

Section A

Q1

Choose the correct answer of the following (any seven) :

a)

When checking a diode, low resistance readings both ways indicate the diode is

a)

open

b)

satisfactory

c)

faulty

d)

not the problem

b)

Which of the following is the correct relationship between IBI_B and IEI_E?

a)

IB=βIEI_B = \beta I_E

b)

IB=IEI_B = I_E

c)

IB=(β+1)IEI_B = (\beta + 1) I_E

d)

IE=(β+1)IBI_E = (\beta + 1) I_B

c)

If a 169.7 V169.7 \text{ V} half-wave peak has an average voltage of 54 V54 \text{ V}, what is the average of two full-wave peaks?

a)

119.9 V119.9 \text{ V}

b)

108.0 V108.0 \text{ V}

c)

115.7 V115.7 \text{ V}

d)

339.4 V339.4 \text{ V}

d)

The Q-point on a load line may be used to determine

a)

VCV_C

b)

VCCV_{CC}

c)

VBV_B

d)

ICI_C

e)

For the BJT to operate in the active (linear) region, the base-emitter junction must be ________-biased and the base-collector junction must be ________-biased.

a)

forward, forward

b)

forward, reverse

c)

reverse, reverse

d)

reverse, forward

f)

What is the level of drain current IDI_D for gate-to-source voltages VGSV_{GS} less than (more negative than) the pinch-off level?

a)

Zero ampere

b)

IDSSI_{DSS}

c)

Negative value

d)

Undefined

g)

How much times reverse saturation current will increase, if temperature increases 15C15^\circ\text{C}?

a)

2.52

b)

4.62

c)

4.12

d)

2.82

h)

The total discharge time for the capacitor in a clamper having C=0.01 \muFC = 0.01 \text{ \mu F} and R=500 k\OmegaR = 500 \text{ k\Omega} is

a)

5 ms5 \text{ ms}

b)

25 ms25 \text{ ms}

c)

2.5 ms2.5 \text{ ms}

d)

50 ms50 \text{ ms}

i)

How many op-amps are required to implement the equation V0=V1V_0 = V_1?

a)

2

b)

3

c)

4

d)

1

j)

A non-inverting closed-loop op-amp circuit generally has a gain factor

a)

less than one

b)

greater than one

c)

of zero

d)

equal to one

[14 Marks]

Section B

Q2

Answer the following:

a)

Differentiate between an ideal and a practical voltage source. Give their graphical representations and convert 10 V10 \text{ V} voltage source with its series resistance of 2 \Omega2 \text{ \Omega} into its equivalent current source.

[7 Marks]
b)

Explain the working of a shunt capacitor filter and derive an approximate expression for ripple factor in half-wave rectifier with shunt capacitor filter.

[7 Marks]
Q3

Answer the following:

a)

Compare the differences between JFET and MOSFET and also prove that the transconductance gmg_m of a JFET is given by gm=2VpIDSIDSSg_m = \frac{2}{|V_p|} \sqrt{I_{DS} I_{DSS}}

[9 Marks]
b)

Explain the UJT as a relaxation oscillator.

[5 Marks]
Q4

Answer the following:

a)

Explain Zener and avalanche breakdown in semiconductors.

[6 Marks]
b)

Define α\alpha and β\beta of a transistor. Also derive the relationship between them.

[8 Marks]
Q5

Answer the following:

a)

Sketch the output characteristics for N-channel JFET with gate-source shorted (i.e., $V_{GS} = 0$). How are ohmic, pinch off and breakdown regions created?

[8 Marks]
b)

Explain the basic structure and working of a P-channel JFET.

[6 Marks]
Q6

Answer the following:

a)

Compare the characteristics of CB, CE and CC configurations of a transistor. Draw the circuit of a common-collector transistor configuration and explain its operation. Also derive the relation between γ\gamma and α\alpha current amplification factors.

[8 Marks]
b)

A collector to base circuit has VCB=24 V,RB=180 k\Omega,RC=3.3 k\OmegaV_{CB} = 24 \text{ V}, R_B = 180 \text{ k\Omega}, R_C = 3.3 \text{ k\Omega} and VCE=10 VV_{CE} = 10 \text{ V}. Calculate hFEh_{FE} and determine VCEV_{CE} when a new transistor is replaced having hFE=120h_{FE} = 120.

[6 Marks]
Q7

Answer the following:

a)

An inverting op-amp has Rf=100 k\OmegaR_f = 100 \text{ k\Omega} and R1=2 k\OmegaR_1 = 2 \text{ k\Omega}. Find the voltage gain of the amplifier. Also find the amplifier input resistance, input current and the output voltage if the input voltage is 0.1 V0.1 \text{ V}. Assume op-amp to be ideal.

[8 Marks]
b)

Explain the working of an op-amp as an integrator circuit.

[6 Marks]
Q8

Answer the following:

a)

Explain a voltage-shunt feedback amplifier with suitable example.

[8 Marks]
b)

In a transistor circuit, load resistance is 5 k\Omega5 \text{ k\Omega} and quiescent current is 1.2 mA1.2 \text{ mA}. Determine the operating point when the battery voltage VCC=12 VV_{CC} = 12 \text{ V}. How will the Q-point change when the load resistance is changed from 5 k\Omega5 \text{ k\Omega} to 7.5 k\Omega7.5 \text{ k\Omega}?

[6 Marks]
Q9

Answer the following:

a)

Describe the structure, symbol and operation of SCR with the help of suitable diagrams.

[7 Marks]
b)

In an N-type semiconductor, the Fermi level lies 0.3 eV0.3 \text{ eV} below the conduction band at 27C27^\circ\text{C}. If the temperature is increased to 55C55^\circ\text{C}, find the new position of the Fermi level.

[7 Marks]

2017 041301

B.Tech 3rd Semester Examination, 2017

Time 3 hours
Full Marks 70
Instructions:
  • The marks are indicated in the right-hand margin.
  • There are NINE questions in this paper.
  • Attempt FIVE questions in all.
  • Question No. 1 is compulsory.

Questions

Q1

Answer the following questions (any seven) :

a)

State the most important SCR parameters for high-current devices.

[2 Marks]
b)

State Fermi energy level ($E_F$) of an intrinsic semiconductor.

[2 Marks]
c)

Define base width modulation.

[2 Marks]
d)

Differentiate between drift current and diffusion current.

[2 Marks]
e)

Define avalanche multiplication.

[2 Marks]
f)

Define peak point current of a UJT.

[2 Marks]
g)

State the definition of threshold voltage of a MOSFET.

[2 Marks]
h)

Define CMRR of an op-amp.

[2 Marks]
i)

State the applications of photodiode.

[2 Marks]
j)

Why are PIV of bridge and centre-tapped full-wave rectifier not same?

[2 Marks]
[14 Marks]
Q2

Answer the following questions:

a)

Accurately analyze the collector-to-base bias circuit is shown in figure 1 to determine the IB,ICI_B, I_C and VCEV_{CE}, when (i) $\beta = 50$; (ii) β=200\beta = 200. Assume VBE=0.7 VV_{BE} = 0.7\text{ V}. [Diagram Fig. 1: Voltage divider bias circuit with $V_{CC}=18\text{V}, R_{B1}=33\text{ k}\Omega, R_{B2}=12\text{ k}\Omega, R_C=1.2\text{ k}\Omega, R_E=1\text{ k}\Omega$]

[8 Marks]
b)

With the help of a neat diagram, explain the input and output characteristics of common-collector (CC) configuration.

[6 Marks]
[14 Marks]
Q3

Answer the following questions:

a)

With the help of band and bond models, explain both N-type and P-type extrinsic silicons.

[8 Marks]
b)

A silicon p-n diode has a doping of ND=8×1015 cm3N_D = 8 \times 10^{15} \text{ cm}^{-3} and NA=2×1016 cm3N_A = 2 \times 10^{16} \text{ cm}^{-3} (for Si: $n_i = 1.5 \times 10^{10} \text{ cm}^{-3}, \epsilon_r = 11.9$). (i) Determine the depletion width in the n-region. (ii) Determine the built-in potential at 300 K300\text{ K}. (iii) Calculate the depletion width when it biased to 0.5 V0.5\text{ V}.

[6 Marks]
[14 Marks]
Q4

What do you mean by rectification? Explain the working of a half-wave rectifier circuit with resistive load. With sinusoidal input, derive the expressions for the following :

a)

Average output voltage and current

[4 Marks]
b)

RMS load current and voltage

[4 Marks]
c)

Form factor and ripple factor

[4 Marks]
d)

Efficiency

[2 Marks]
[14 Marks]
Q5

Answer the following questions:

a)

Draw the circuit of a UJT relaxation oscillator with provision for frequency adjustment and spike waveform. Show all waveforms, and explain the circuit operation.

[8 Marks]
b)

Draw the circuit diagram to show how an SCR can be triggered by the application of a pulse to gate terminal. Sketch the circuit waveforms and explain its operation.

[6 Marks]
[14 Marks]
Q6

Answer the following questions:

a)

Explain the construction and characteristics of n-channel JFET.

[8 Marks]
b)

The FET circuit is shown in figure 2 has R1=3.5 MΩ,R2=1.5 MΩ,Rs=2 kΩ,RL=20 kΩ,rd=40 kΩR_1 = 3.5\text{ M}\Omega, R_2 = 1.5\text{ M}\Omega, R_s = 2\text{ k}\Omega, R_L = 20\text{ k}\Omega, r_d = 40\text{ k}\Omega and gm=2.5 mA/Vg_m = 2.5\text{ mA/V}. Find its input impedance and output impedance and voltage gain. [Diagram Fig. 2: JFET amplifier with voltage divider bias ($R_1, R_2$), source resistor ($R_S$), and load ($R_L$)]

[6 Marks]
[14 Marks]
Q7

Answer the following questions:

a)

Given IE=2.5 mA,hfe=140,hoe=20 μsI_E = 2.5\text{ mA}, h_{fe} = 140, h_{oe} = 20\text{ }\mu\text{s} and hob=0.5 μsh_{ob} = 0.5\text{ }\mu\text{s}, determine (i) the common-emitter hybrid equivalent circuit; (ii) the common-base $r_e$-model.

[8 Marks]
b)

Compare the advantages and disadvantages of biasing schemes in BJT.

[6 Marks]
[14 Marks]
Q8

Answer the following questions:

a)

Draw the circuit diagram of a practical voltage series feedback amplifier and derive the expressions for input resistance, output resistance, voltage gain and current gain.

[8 Marks]
b)

Explain the operation and characteristics of photodiode.

[6 Marks]
[14 Marks]
Q9

Answer the following questions:

a)

Explain the summing and differential amplifiers using op-amp with derivation of output voltage.

[8 Marks]
b)

Calculate the output voltages V2V_2 and V3V_3 in the circuit of the following figure 3 : [Diagram Fig. 3: Two-stage op-amp circuit. First stage is non-inverting ($R_f=20\text{k}\Omega, R_1=10\text{k}\Omega$), second stage is inverting ($R_{f2}=200\text{k}\Omega, R_{i2}=200\text{k}\Omega$)]

[6 Marks]
[14 Marks]

2017 041401

B.Tech 4th Semester Examination, 2017

Time 3 hours
Full Marks 70
Instructions:
  • There are Nine Questions in this Paper. All questions carry equal marks.
  • Attempt Five questions in all.
  • Question No. 1 is Compulsory.
  • The marks are indicated in the right-hand margin.

Section A

Q1

Choose the correct alternatives for any seven of the following;

a)

The junction capacitance of a linearly graded junction varies with the applied reverse voltage (V) as

a)

V

b)

V1/3V^{-1/3}

c)

V1/2V^{-1/2}

d)

V1/4V^{-1/4}

b)

Reverse saturation current in a silicon PN junction diode is doubled for every

a)

10C10^\circ\text{C} increase in temperature

b)

5C5^\circ\text{C} increase in temperature

c)

2C2^\circ\text{C} increase in temperature

d)

1C1^\circ\text{C} increase in temperature

c)

A rectifier is used to

a)

convert ac to dc

b)

convert dc to ac

c)

convert high voltage to low voltage

d)

convert low voltage to high voltage

d)

Polarity of dc output voltage of a half wave rectifier can be reversed by reversing

a)

transformer primary

b)

the diode

c)

transformer secondary

d)

none of these

e)

When a transistor operates in active region, it behaves as

a)

a closed switch

b)

an open switch

c)

an amplifier

d)

none of these

f)

If the Q-point of a transistor lies at ________, the negative part of input signal is clipped at output.

a)

near saturation point

b)

near cut-off point

c)

middle of active region

d)

anywhere of the load line

g)

Trans-conductance of JFET is measured in

a)

mhos or siemens

b)

ohms

c)

volts

d)

amperes

h)

The threshold voltage of an enhancement pMOS transistor is

a)

less than zero volt

b)

equal to zero volt

c)

greater than zero volt

d)

none of these

i)

In a common-emitter amplifier, the unbiased emitter resistance provides

a)

voltage-series feedback

b)

voltage-shunt feedback

c)

current-series feedback

d)

current-shunt feedback

j)

An ideal OP-AMP has

a)

infinite voltage gain

b)

zero output impedance

c)

infinite signal bandwidth

d)

all of these

[14 Marks]

Section B

Q2

Answer the following:

a)

What is a forward biased and reverse biased diode? How is the width of the space charge region and barrier height affected in forward biased and reversed diode?

[8 Marks]
b)

What is the relation between current and voltage in a PN junction diode? Explain each term involved in that relation. The reverse saturation current of a silicon PN junction diode is 10 \muA10 \text{ \mu A} at the temperature 300 K300 \text{ K}. Determine the forward bias voltage to be applied across the PN junction to obtain a current of about 100 mA100 \text{ mA}.

[6 Marks]
Q3

Answer the following:

a)

Explain depletion layer capacitance and diffusion capacitance of a PN junction diode in detail. How do these capacitances vary with respect to applied bias voltage across a silicon PN-junction diode?

[7 Marks]
b)

A silicon has a doping density of acceptors NA=4×1018/ cm3N_A = 4 \times 10^{18} / \text{ cm}^3 in the P-type region and a doping density of donors ND=3×1015/ cm3N_D = 3 \times 10^{15} / \text{ cm}^3 in the N-type region. Assume ni=2.5×1010/ cm3n_i = 2.5 \times 10^{10} / \text{ cm}^3 at room temperature of 300 K300 \text{ K} and the dielectric constant of silicon as 11.711.7. Determine the built in potential and the total space charge (depletion layer) width at 300 K300 \text{ K}.

[7 Marks]
Q4

Answer the following:

a)

What is ripple factor? Why ripple factor is so important in power supply? Derive the expression of ripple factor of a full wave rectifier using centre-tap transformer.

[8 Marks]
b)

A single phase full wave rectifier circuit consists of four diodes, a 250 \Omega250 \text{ \Omega} load resistance and it is fed from a 15V,50 Hz15\text{V}, 50 \text{ Hz} ac power supply. The forward resistance of each diode is 25 \Omega25 \text{ \Omega}. Determine the dc output voltage, dc load current and efficiency.

[6 Marks]
Q5

Answer the following:

a)

What is a bipolar junction transistor (BJT)? Why are these transistors called bipolar devices? What are the different configuration of BJT?

[6 Marks]
b)

Derive the relation between α\alpha and β\beta of a BJT.

[4 Marks]
c)

The collector current of a transistor is 100 mA100 \text{ mA} and is β\beta is 7575. Calculate the value of base current and emitter current.

[4 Marks]
Q6

Answer the following:

a)

What are the different types of biasing? Derive the expression for stability factor of self bias circuit.

[8 Marks]
b)

A voltage divider bias circuit of a BJT is shown in Fig.-1 below. Determine the emitter current and collector-to-emitter voltage. Calculate the collector potential Vc. Assume VBE=0.65V_{BE} = 0.65 and β=75\beta = 75.

[Diagram: Figure-1 - Voltage divider bias circuit of N-P-N transistor. $V_{CC}=18\text{V}, R_1=10\text{k}\Omega, R_2=9.5\text{k}\Omega, R_C=1.5\Omega, R_E=4.5\text{k}\Omega, V_{BE}=0.65, \beta=75$]

[6 Marks]
Q7

Answer the following:

a)

Discuss the construction and working principle of a P-channel enhancement type MOSFET with diagrams and draw the device characteristics.

[8 Marks]
b)

In an N-channel JFET, IDSS=12 mA,Vp=6 VI_{DSS}=12 \text{ mA}, V_p=-6 \text{ V}. Find the minimum value of VDSV_{DS} for pinch off operation. Determine the value of drain current at VGS=3VV_{GS}=-3 \text{V}.

[6 Marks]
Q8

Answer the following:

a)

Draw the circuit diagram of an integrator using opamp and explain its operation. If a square wave voltage signal is applied at the input of an integrator then draw its out in same time scale of input signal.

[9 Marks]
b)

Draw the circuit diagram of a non-inverting summing amplifier using opamp and determine the output voltage.

[5 Marks]
Q9

Write short notes on the following:

a)

Photo diode

[7 Marks]
b)

Unijunction Transistor

[7 Marks]

2016 041301

B.Tech 3rd Semester Examination, 2016

Time 3 hours
Full Marks 70
Instructions:
  • There are Nine Questions in this Paper.
  • Attempt Five questions in all.
  • Question No. 1 is Compulsory.
  • The marks are indicated in the right hand margin.

Questions

Q1

Answer the following questions:

a)

Difference between BJT and MOSFET.

[2 Marks]
b)

Define thermal run way.

[2 Marks]
c)

Difference between depletion mode and enhancement mode MOSFET.

[2 Marks]
d)

List the most important SCR parameters for low-current devices.

[2 Marks]
e)

Emitter saturation voltage of UJT.

[2 Marks]
f)

List the most important parameters of operational amplifier and their typical values.

[2 Marks]
g)

Define the Pinch-off voltage JFET.

[2 Marks]
h)

Define flat-band voltage.

[2 Marks]
i)

State the applications of light emitting diode.

[2 Marks]
j)

Why the BJT dimensions of Emitter, Base and Collector of are not same?

[2 Marks]
[14 Marks]
Q2

Answer the following questions:

a)

Derive and explain an intrinsic carrier concentration ($n_i$) of a semiconductor.

[6 Marks]
b)

Explain the operation and characteristics of light emitting diode.

[8 Marks]
[14 Marks]
Q3

Answer the following questions:

a)

For the circuit shown in Figure 1, determine (i) d.c. output voltage (ii) rectification efficiency (iii) peak inverse voltage (iv) output frequency [Diagram: Center-tapped transformer with 10:1 ratio, 220V 50Hz input, bridge rectifier with four diodes, 250 ohm load resistor]

[8 Marks]
b)

Explain the operation of p+np^+-n silicon diode at equilibrium condition. Also derive the expression for the following : (i) Maximum electric field ($E_{max}$) (ii) Depletion width (W) (iii) Built-in potential ($V_{bi}$)

[6 Marks]
[14 Marks]
Q4

Answer the following questions:

a)

Accurately analyze the collector-to-base bias circuit is shown in Figure 2 to determine the IB,ICI_B, I_C and VCEV_{CE} when (i) β=50\beta=50 and (ii) β=200\beta=200 Assume VBE=0.7 VV_{BE} = 0.7\text{ V}. [Diagram: Collector-to-base bias circuit with $V_{CC}=18\text{V}, R_C=2.2\text{ k}\Omega, R_B=270\text{ k}\Omega$]

[8 Marks]
b)

Sketch typical BJT common-emitter input and output characteristics. Explain the shapes of the characteristics.

[6 Marks]
[14 Marks]
Q5

Answer the following questions:

a)

Draw the two biasing circuits for JFET and explain.

[8 Marks]
b)

Derive the gain expression of an integrator and a differentiator using op-amp.

[6 Marks]
[14 Marks]
Q6

Answer the following questions:

a)

Explain the basic operation and characteristics of n-channel depletion type MOSFET.

[8 Marks]
b)

Sketch a 180180^\circ phase control for an SCR. Draw the load waveform and explain the circuit operation.

[6 Marks]
[14 Marks]
Q7

Answer the following questions:

a)

Draw Sketches to show the basic construction and equivalent circuit of a unijunction transistor (UJT). Briefly explain the device operation.

[8 Marks]
b)

Design a clamper to perform the function shown in the Figure 3 shown below. [Diagram: Input pulse ±20V\pm 20\text{V}, output pulse 30V30\text{V} to 10V-10\text{V}, Design block with input VinV_{in} and output $V_{out}$]

[6 Marks]
[14 Marks]
Q8

Answer the following questions:

a)

Briefly explain the small signal model of JFET.

[6 Marks]
b)

An integrator using op-amp has following component values. Ri=1 kΩ,Rf=100 kΩR_i = 1\text{ k}\Omega, R_f = 100\text{ k}\Omega and Cf=0.1 μFC_f = 0.1\text{ }\mu\text{F}. A 1 kHz1\text{ kHz} square wave applied to integrator. The amplifier uses ±15 V\pm 15\text{ V} supply and output saturates at ±14V\pm 14\text{V} if input alternates between ±5 V\pm 5\text{ V} then. (i) Determine the maximum change in output (ii) Determine the maximum slew rate.

[8 Marks]
[14 Marks]
Q9

Answer the following questions:

a)

Define the gate power dissipation and explain its importance in SCR.

[7 Marks]
b)

Explain the operation of centre tapped full wave rectifier. And calculate the rms load current and voltage for a sinusoidal input.

[7 Marks]
[14 Marks]

2016 041401

B.Tech 4th Semester Examination, 2016

Time 3 hours
Full Marks 70
Instructions:
  • The marks are indicated in the right-hand margin.
  • There are NINE questions in this paper.
  • Attempt FIVE questions in all.
  • Question No. 1 is compulsory.

Questions

Q1

Choose the correct alternatives for any seven of the following :

a)

The width of depletion layer of a P-N junction diode is (i) independent of applied voltage (ii) increased with applied reverse bias voltage (iii) increased with applied forward bias voltage (iv) increased with doping

b)

A diffusion current flows through a P-N junction just after its formation due to (i) minority carriers (ii) majority carriers (iii) forward bias (iv) reverse bias

c)

A half-wave rectifier is equivalent to a (i) clipping circuit (ii) clamper circuit (iii) clamper circuit with negative bias (iv) clamper circuit with positive bias

d)

In an LC filter, the ripple factor (i) increases with load current (ii) increases with load resistance (iii) remains constant with load resistance (iv) decreases with load current

e)

If collector-base junction is reverse biased and the emitter-base junction is forward biased, the transistor operates at (i) saturation region (ii) cut-off region (iii) active region (iv) All of the above

f)

If the Q point of a transistor lies at ________, the positive part of input signal is clipped at output. (i) near saturation point (ii) near cut-off point (iii) middle of active region (iv) anywhere of the load line

g)

The input impedance of a JFET is in the range of (i) above 1 MΩ1\text{ M}\Omega (ii) 200 kΩ200\text{ k}\Omega (iii) 2 kΩ2\text{ k}\Omega (iv) 200 Ω200\text{ }\Omega

h)

The threshold voltage of an enhancement NMOS transistor is (i) less than zero volt (ii) equal to zero volt (iii) greater than zero volt (iv) None of the above

i)

Which topology of feedback amplifier has very high input and output impedances? (i) Voltage series feedback (ii) Voltage shunt feedback (iii) Current series feedback (iv) Current shunt feedback

j)

An ideal OP-AMP has (i) infinite input impedance (ii) zero output impedance (iii) infinite voltage gain (iv) All of the above

[14 Marks]
Q2

Answer the following questions:

a)

Draw the energy-band diagram of an open-circuited P-N junction diode and derive the expression for contact difference potential across this open-circuited P-N junction diode.

[9 Marks]
b)

At the room temperature of 300 K300\text{ K}, the resistivities of the N-type region and P-type region of a germanium P-N junction are 6.5 ohm-cm6.5\text{ ohm-cm} and 4.5 ohm-cm4.5\text{ ohm-cm} respectively. Determine the contact potential and potential energy barrier at 300 K300\text{ K}. Assume— ni=2.5×1013 /cm3n_i = 2.5 \times 10^{13}\text{ /cm}^3, μn=2000 cm2 /Vs\mu_n = 2000\text{ cm}^2\text{ /Vs}, μp=900 cm2 /Vs\mu_p = 900\text{ cm}^2\text{ /Vs}.

[5 Marks]
[14 Marks]
Q3

Answer the following questions:

a)

Explain how the process of avalanche breakdown occurs in P-N junction. How is it different from Zener breakdown?

[7 Marks]
b)

Draw the circuit of a Zener diode shunt-regulated power supply. In this regulated power supply, required output voltage across load resistance RLR_L is 10 V10\text{ V} with load current IL=50 mAI_L = 50\text{ mA}. Input d.c. voltage varies from 20 V20\text{ V} to 30 V30\text{ V}. Determine the maximum and minimum Zener currents. [Consider $P_z(\text{max}) = 1000\text{ mW}$]

[7 Marks]
[14 Marks]
Q4

Answer the following questions:

a)

What is transformer utilization factor? Derive the transformer utilization factor of a half-wave rectifier circuit. Discuss the difference between the half-wave and full-wave rectifier circuits.

[9 Marks]
b)

The turn ratio of the transformer used in single-phase full-wave rectifier circuit is 20:120:1. The primary of transformer is connected to 230 V230\text{ V} and 50 Hz50\text{ Hz} a.c. supply. Determine the peak inverse voltage of each diode and output frequency. Assume all diodes are ideal.

[5 Marks]
[14 Marks]
Q5

Answer the following questions:

a)

Draw the circuit diagram of an N-P-N junction transistor CE configuration and describe the static input and output characteristics. Also define active, saturation and cut-off regions and saturation resistance in CE configuration.

[6 Marks]
b)

Derive the relation between α\alpha and β\beta of a BJT.

[4 Marks]
c)

A BJT has a base current IB=150 μAI_B = 150\text{ }\mu\text{A}, ICO=10 μAI_{CO} = 10\text{ }\mu\text{A} and α=0.98\alpha = 0.98. Calculate the collector current and emitter current.

[4 Marks]
[14 Marks]
Q6

Answer the following questions:

a)

What do you mean by biasing? Why is it required? Define stability factors for biasing. What are the factors on which stability of biasing depends?

[8 Marks]
b)

The voltage divider bias circuit of N-P-N transistor is shown in figure below. Calculate the values of R1R_1 and RCR_C when collector current is 1 mA1\text{ mA} and collector to emitter voltage is 2.6 V2.6\text{ V}. Assume VBE=0.65 VV_{BE} = 0.65\text{ V} and β=100\beta = 100. [Diagram: Voltage divider bias with $V_{CC}=6\text{V}, R_1, R_2=10\text{k}\Omega, R_C, R_E=350\text{ }\Omega$]

[6 Marks]
[14 Marks]
Q7

Answer the following questions:

a)

Discuss the construction and working principle of an N-channel enhancement-type MOSFET with diagrams and draw the device characteristics.

[8 Marks]
b)

In an N-channel JFET, IDSS=12 mAI_{DSS} = 12\text{ mA} and VP=8 VV_P = -8\text{ V} and gmo=4000 μsg_{mo} = 4000\text{ }\mu\text{s}. Determine the drain current and transconductance at VGS=5 VV_{GS} = -5\text{ V}.

[6 Marks]
[14 Marks]
Q8

Answer the following questions:

a)

Draw the circuit diagram of a differentiator using OP-AMP and explain its operation. If a square-wave voltage signal is applied at the input of a differentiator, then draw its out in same timescale of input signal.

[9 Marks]
b)

Draw the circuit diagram of an inverting summing amplifier using OP-AMP and determine the output voltage.

[5 Marks]
[14 Marks]
Q9

Write short notes on the following:

a)

Light-emitting diode

[7 Marks]
b)

Silicon-controlled rectifier

[7 Marks]
[14 Marks]

2015 041301

B.Tech 3rd Semester Exam., 2015

Time 3 hours
Full Marks 70
Instructions:
  • (i) The marks are indicated in the right-hand margin.
  • (ii) There are NINE questions in this paper.
  • (iii) Attempt FIVE questions in all.
  • (iv) Question No. 1 is compulsory.

Questions

Q1

Answer the following questions:

a)

Why is silicon preferred over germanium in making of semiconductor devices?

b)

What do you understand by transition capacitance of a diode?

c)

Why we cannot measure the barrier potential of a diode using voltmeter?

d)

Explain one disadvantage of bridge rectifier.

e)

Capacitor filter is not suited for heavy loads. Why?

[14 Marks]
Q2

Answer the following questions:

a)

Derive and explain an intrinsic carrier concentration ($n_i$) of a semiconductor.

[6 Marks]
b)

Explain the operation and characteristics of light emitting diode.

[8 Marks]
[14 Marks]
Q3

Answer the following questions:

a)

For the circuit shown in Figure 1, determine (i) d.c. output voltage (ii) rectification efficiency (iii) peak inverse voltage (iv) output frequency

[8 Marks]
b)

Explain the operation of p-n silicon diode at equilibrium condition. Also derive the expression for the following: (i) Maximum electric field ($E_{max}$) (ii) Depletion width (W) (iii) Built-in potential ($V_{bi}$)

[6 Marks]
[14 Marks]
Q4

Answer the following questions:

a)

Accurately analyze the collector-to-base bias circuit is shown in Figure 2 to determine the IBI_B, ICI_C and VCEV_{CE} when (i) β=50\beta = 50 and (ii) β=200\beta = 200. Assume VBE=0.7V_{BE} = 0.7 V.

[8 Marks]
b)

Sketch typical BJT common-emitter input and output characteristics. Explain the shapes of the characteristics.

[6 Marks]
[14 Marks]
Q5

Answer the following questions:

a)

Draw the two biasing circuits for JFET and explain.

[8 Marks]
b)

Derive the gain expression of an integrator and a differentiator using op-amp.

[6 Marks]
[14 Marks]
Q6

Answer the following questions:

a)

Explain the basic operation and characteristics of n-channel depletion type MOSFET.

[8 Marks]
b)

Sketch a 180180^\circ phase control for an SCR. Draw the load waveform and explain the circuit operation.

[6 Marks]
[14 Marks]
Q7

Answer the following questions:

a)

Draw Sketches to show the basic construction and equivalent circuit of a unijunction transistor (UJT). Briefly explain the device operation.

[8 Marks]
b)

Design a clamper to perform the function shown in the Figure 3 shown below.

[6 Marks]
[14 Marks]
Q8

Answer the following questions:

a)

Briefly explain the small signal model of JFET.

[6 Marks]
b)

An integrator using op-amp has following component values: Ri=1 kΩ,Rf=100 kΩR_i = 1\text{ k}\Omega, R_f = 100\text{ k}\Omega and Cf=0.1 μFC_f = 0.1\text{ }\mu\text{F}. A 1 kHz1\text{ kHz} square wave applied to integrator. The amplifier uses ±15 V\pm 15\text{ V} supply and output saturates at ±14 V\pm 14\text{ V} if input alternates between ±5 V\pm 5\text{ V} then: (i) Determine the maximum change in output (ii) Determine the maximum slew rate.

[8 Marks]
[14 Marks]
Q9

Answer the following questions:

a)

Define the gate power dissipation and explain its importance in SCR.

[7 Marks]
b)

Explain the operation of centre tapped full wave rectifier. And calculate the rms load current and voltage for a sinusoidal input.

[7 Marks]
[14 Marks]

2015 041401

B.Tech 4th Semester Exam., 2015

Time 3 hours
Full Marks 70
Instructions:
  • (i) The marks are indicated in the right-hand margin.
  • (ii) There are NINE questions in this paper.
  • (iii) Attempt FIVE questions in all.
  • (iv) Question No. 1 is compulsory.

Questions

Q1

Choose the correct option of any seven of the following:

a)

The mobility of an electron in a conductor is expressed in terms of

a)

cm2/V-s\text{cm}^2/\text{V-s}

b)

cm/V-s\text{cm}/\text{V-s}

c)

cm2/V\text{cm}^2/\text{V}

d)

cm2/s\text{cm}^2/\text{s}

b)

Current flow in a semiconductor depends on the phenomenon of

a)

drift

b)

diffusion

c)

recombination

d)

All of the above

c)

A certain amount of --- still flows when diode is under reverse biased condition.

a)

reverse bias current

b)

reverse saturation current

c)

reverse diode current

d)

diode off current

d)

Bridge rectifiers are preferred because

a)

they require small transformer

b)

they have less PIV

c)

they need small transformer and also have less PIV

d)

they have low ripple factor

e)

Transistor is

a)

current-controlled current device

b)

current-controlled voltage device

c)

voltage-controlled current device

d)

voltage-controlled voltage device

f)

In a JFET, drain current is maximum when VGSV_{GS} is

a)

zero

b)

negative

c)

positive

d)

equal to VPV_P

g)

Input impedance of FET is

a)

low

b)

high

c)

medium

d)

None of the above

h)

Which of the following will not decrease as a result of introduction of feedback?

a)

Instability

b)

Bandwidth

c)

Overall gain

d)

Distortion

i)

In a common-emitter amplifier, the unbypassed emitter resistance provides

a)

voltage shunt feedback

b)

current series feedback

c)

positive voltage feedback

d)

positive current feedback

j)

LEDs are fabricated from

a)

silicon

b)

germanium

c)

silicon or germanium

d)

gallium arsenide

[14 Marks]
Q2

Answer the following questions:

a)

What is the concentration of holes in Si crystals having donor concentration of 1.4×1024/ m31.4 \times 10^{24} / \text{ m}^3, when the intrinsic carrier concentration is 1.4×1018/ m31.4 \times 10^{18} / \text{ m}^3? Find the ratio of electrons to holes concentration.

[6 Marks]
b)

Draw the V-I characteristic of Si and Ge diode on the same axis and explain.

[8 Marks]
[14 Marks]
Q3

Answer the following questions:

a)

Explain the working of centre-tapped full-wave rectifier.

[6 Marks]
b)

For the circuit of Fig. 1, determine the range of RLR_L and ILI_L that will result in VRLV_{R_L} being maintained at 10 V10\text{ V}.

[8 Marks]
[14 Marks]
Q4

Answer the following questions:

a)

Derive the relation between α\alpha and β\beta of BJT.

[5 Marks]
b)

Describe the working of NPN transistor and explain the input and output characteristics of common-emitter amplifier.

[9 Marks]
[14 Marks]
Q5

Answer the following questions:

a)

Find ICI_C and VCEV_{CE} for the circuit shown in Fig. 2 for the BJT whose β=80\beta = 80.

[6 Marks]
b)

Draw and explain potential divider biasing circuit.

[8 Marks]
[14 Marks]
Q6

Answer the following questions:

a)

List the advantages and disadvantages of FET over BJT.

[5 Marks]
b)

Explain the working of JFET along with its transfer and output characteristics.

[9 Marks]
[14 Marks]
Q7

Answer the following questions:

a)

What are the advantages of negative feedback in amplifiers? Explain them.

[6 Marks]
b)

Draw the circuit diagram of voltage series feedback amplifier and derive the expression for input and output impedances.

[8 Marks]
[14 Marks]
Q8

Answer the following questions:

a)

Name six important parameters of an operational amplifier. What are their ideal values and practical values?

[6 Marks]
b)

Describe the working of OPAMP as an integrator and an inverter.

[8 Marks]
[14 Marks]
Q9

Write notes on the following:

a)

SCR

[7 Marks]
b)

LED

[7 Marks]
[14 Marks]

2013 041301

B.Tech 3rd Semester Exam., 2013

Time 3 hours
Full Marks 70
Instructions:
  • The marks are indicated in the right-hand margin.
  • There are NINE questions in this paper.
  • Attempt FIVE questions in all.
  • Question No. 1 is compulsory.

Questions

Q1

Choose the correct alternative of the following (any seven):

a)

When a step-input is given to an op-amp integrator, the output will be (i) a ramp (ii) a sinusoidal wave (iii) a rectangular wave (iv) a triangular wave with d.c. bias

b)

In a JFET, at pinch-off voltage applied on the gate (i) the drain current becomes almost zero (ii) the drain current begins to decrease (iii) the drain current is almost at saturation value (iv) the drain to source voltage is close to zero volt

c)

The value of ripple factor of a half-wave rectifier without filter is approximately (i) 1.2 (ii) 0.2 (iii) 2.2 (iv) 2.0

d)

In the voltage regulator shown in Fig. 1, if the current through the load decreases [Diagram: Zener voltage regulator with series resistor R1, Zener diode D, and load resistor RL] (i) the current through R1 will increase (ii) the current through R1 will decrease (iii) Zener diode current will increase (iv) Zener diode current will decrease

e)

The lowest output impedance is obtained in case of BJT amplifiers for (i) CB configuration (ii) CE configuration (iii) CC configuration (iv) CE with RER_E configuration

f)

What is the peak current through the resistor in the circuit shown in Fig. 2 assuming the diode to be ideal? [Diagram: AC source 12sin(omega t) in series with 1k ohm resistor, a diode, and a 4V battery opposing the source] (i) 4 mA (ii) 8 mA (iii) 12 mA (iv) 16 mA

[14 Marks]
Q2

Answer the following questions:

a)

Explain how the process of avalanche breakdown occurs in a P-N junction diode. How is it different from Zener breakdown?

b)

A silicon diode has a saturation current of 5 μA5\text{ }\mu\text{A} at room temperature of 300 K300\text{ K}. Determine its value at 400 K400\text{ K}.

[14 Marks]
[14 Marks]
Q3

Answer the following questions:

a)

For the circuit shown in Fig. 3 below: [Diagram: Zener regulator with Rs=20 Ω,Vz=18 V,RL=200 ΩR_s=20\text{ }\Omega, V_z=18\text{ V}, R_L=200\text{ }\Omega. Input VinV_{in} can vary from 20 V20\text{ V} to $30\text{ V}$] Find— (i) the minimum and maximum currents in Zener diode; (ii) the minimum and maximum power dissipated in the diode.

b)

Draw the voltage doubler circuit. Sketch input and output waveforms and explain the circuit operation.

[14 Marks]
[14 Marks]
Q4

Answer the following questions:

a)

A simple full-wave bridge rectifier circuit has an input voltage of 240 V240\text{ V} a.c. r.m.s. Assume the diodes to be ideal. Find the output d.c. current, d.c. voltage, r.m.s. values of output currents and voltages. Assume load resistance to be 10 kΩ10\text{ k}\Omega.

b)

Explain α\alpha and β\beta factors of transistors. Derive the expressions for them and state their meanings.

[14 Marks]
[14 Marks]
Q5

Answer the following questions:

a)

In a self-biased CE amplifier, RC=5 kΩ,R2=9 kΩ,R1=81 kΩ,β=50R_C = 5\text{ k}\Omega, R_2 = 9\text{ k}\Omega, R_1 = 81\text{ k}\Omega, \beta = 50 and RE=810 ΩR_E = 810\text{ }\Omega. Compute the stability factor.

b)

What is operating point? Explain its physical significance with proper example.

[14 Marks]
[14 Marks]
Q6

Answer the following questions:

a)

State the advantages of FET over BJT.

b)

Derive an expression for the gain of negative voltage feedback amplifier.

[14 Marks]
[14 Marks]
Q7

Answer the following questions:

a)

What is clamping circuit? With neat diagram, explain different types of clampers.

b)

Sketch VoutV_{out} for the network shown in Fig. 4 below. [Diagram: Input square wave ±20V\pm 20\text{V} applied to circuit with capacitor C, ideal diode D with 5V5\text{V} bias, and resistor R]

[14 Marks]
[14 Marks]
Q8

Answer the following questions:

a)

Compute the voltage gain and power gain of the amplifier circuit shown in Fig. 5 below: [Diagram: Op-amp amplifier with 1 MΩ1\text{ M}\Omega feedback resistor and 1 MΩ1\text{ M}\Omega input resistor]

b)

Explain the turn-off mechanism of SCR.

[14 Marks]
[14 Marks]
Q9

Write short notes on the following:

a)

UJT

b)

Pi filter

c)

Light-emitting diode (LED)

d)

Integrator

[14 Marks]

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